[Mspgcc-users] SPI Rx and Tx Irqs

[Peter Mueller]

Hi all,

I have a question regarding the SPI interrupt handling. My 
understanding is that at the same time when a byte gets clocked into 
the receiver another byte gets sent from the sender.
If Rx and Tx interrupts are active I should get two interrupt requests 
basically at the same time. Is this correct or do I misunderstand 
something?

Thanks,
Peter