Talking to myself again :)
There is a problem is in basic_clock.h
DIVA0 is defined as 0x10
DIVA1 is defined as 0X20
DIVA_0 is defined as (0<<4)
DIVA_2 is defined as (1<<4)
My dumb code was
BSCTL1 = DIVA1, which divided the clock by 4.
BSCTL1 = DIVA0 would still divide it by 2.
BSCTL1 = DIVA_0 is correct in my case.
In the user manual, the bits are labled DIVA.1 and DIVA.0
That might be better than DIVA0 and DIVA1 in terms of making it more
idiot proof.

Thanks to all,

Garst the idiot

"Garst R. Reese" wrote:
> 
> Hi Steve,
> Thanks. Turns out it was user error. I had BSCTL1 set to DIVA1. Now that
> should have given me 500us between pulses, but I was seeing 1ms. Setting
> it to 0 got me to 250us tho. A bit strange. The 100kHz xtal calls for
> the same caps as a 32kHz xtal.
> Turning off the caps stopped the osc.

Reply via email to