Hi, if data is in section infomen it works; you can clear (and set) bits. I tested this only with the equivalent IAR pragma memory=constseg(INFO) but it works ( http://www.ergobike.de/en/zube04.html ).
Rolf mspgcc-users@lists.sourceforge.net schrieb am 05.05.04 01:52:33: > > Dmitry wrote: > > > > Fellows, > > there is a code snippet: > > > > static int __attribute__((section(".infomemnobits"))) interf; > > > > void critical flash_ww(int *data, int val) > > { > > while(BUSY & FCTL3); > > FCTL3 = FWKEY; > > FCTL1 = FWKEY + WRT; > > *data = val; > > FCTL1 = FWKEY; > > FCTL3 = FWKEY + LOCK; > > } > > > > void write_value(int val) > > { > > flash_ww(&interf, val); > > } > > > > int read_value() > > { > > return interf; > > } > > > > So, any write to flash memory returns no errors, > > however reading from information memory always returns zero. > > Where am I wrong? > > > You have specifically asked not to initialize interf. You can only > change bits that are 1's. > I do something like this: > > const int interf = 0xffff; > > > void critical flash_ww(int *data, int val) > WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer > dint(); > FCTL2 = FWKEY + FSSEL_2 + FN2; // SMCLK/4 for Flash Timing Generator > 3.684Mhz clk > FCTL3 = FWKEY; > FCTL1 = FWKEY + WRT; > *data = val; //initialized to 0xffff > FCTL1 = FWKEY; > FCTL3 = FWKEY + LOCK; > // re-enalble WDT? > eint(); > }; > > It only works once since you can only reliably write to 0xffff. > > Cheers, > Garst > > > ------------------------------------------------------- > This SF.Net email is sponsored by: Oracle 10g > Get certified on the hottest thing ever to hit the market... Oracle 10g. > Take an Oracle 10g class now, and we'll give you the exam FREE. > http://ads.osdn.com/?ad_id=3149&alloc_id=8166&op=click > _______________________________________________ > Mspgcc-users mailing list > Mspgcc-users@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/mspgcc-users