[Mspgcc-users] No timerb1 irqs with mspgcc while many timerb1 irqs with iar

[nobodyO]

Hi,

i've ported a project from iar 1.26 to mspgcc and it can be compiled without 
warnings/errors but it does not work correct; the timerb1 irqs are missing.
Therefore the wait function (wait_while_not_50ms) waits forever:

-------------------------------------------------------------------
# MSP430F149 hello world program with timerb1 based LED timing

#include <io.h>
#include <signal.h>

static volatile unsigned int ui_wait_counter1;

// Wait as long 50 ms are not completed.
void
wait_while_not_50ms (void) ///////// IAR: works, MSPGCC: Waits 
forever!!!!!!!!!!!!!!!!!!!!!!!!!!!!!1
{
  while (ui_wait_counter1); 
}
     
extern inline
interrupt (TIMERA0_VECTOR)
timer_a0 (void)
{
}

extern inline
interrupt (TIMERA1_VECTOR)
timer_a1 (void)
{
}

extern inline
interrupt (TIMERB0_VECTOR)
timer_b0 (void)
{
}

extern inline
interrupt (TIMERB1_VECTOR)
timer_b1 (void)
{
  switch (TBIV)
  {
    case 2:                    // (TB1) Capture 
      break;
    case 4:                    // (TB2) Capture 
      break;
    case 6:                    // (TB3) Capture 
      break;
    case 8:                    // (TB4) Capture 
      break;
    case 10:                   // (TB5) Compare 
      break;
    case 12:                   // (TB6) Compare
      break;
    case 14:                   // Timer overflow. Every 10.3 ms with 8 MHz 
quartz.
      TACTL &= ~0x0006;         //  TACTL : Interrupt overflow not set
      if (ui_wait_counter1)     // count down
        ui_wait_counter1--;
      break;
    default:
      break;
  }
  P1OUT = ~P1OUT;               // toggle
  return;
}

int
main (void)
{
  static volatile unsigned char uc_250ms_old;
  P1DIR = 0xFF;                 //port 1 = output
  WDTCTL = WDTPW + WDTHOLD;     // Stop WDT
  WDTCTL = 0x5a1d;              //  WD as Timer : 250.0ms; Timer=ACLK   0x5a1d
   BCSCTL1 &= ~XT2OFF;           // XT2on
  do                            // wait for MCLK from quartz
  {
    IFG1 &= ~OFIFG;             // Clear OSCFault flag
    for (uc_250ms_old = 0; uc_250ms_old < 0xff; uc_250ms_old++);        // Time 
(approx. 3 ms) for flag to set
  }
  while (IFG1 & OFIFG);         // OSCFault flag still set?
  BCSCTL1 = 0x07;               // LFXT1: XT2on: LF quartz for MCLK, divide by 
1, XT5V
  BCSCTL2 = SELM1 + SELS;       // LFXT2: use HF quartz (XT2), internal 
resistor on, divide by one,  MCLK = SMCLK = XT2 (safe)

  TACTL = 0x0210;               //  TACTL : Interrupt overflow not set;
  // Timer counts up to CCR0; CLK= 1:1 SMCLK
  // description : page 10-25
  TBCTL = 0x0256;               //  TBCTL : Interrupt overflow not set;
  //  Timer counts up to CCR0; CLK= 1:2 SMCLK
  //  Counter length 16 Bit; TBLCGRP is for one
  //  description : page 10-25
  TBCCR0 = 41430;               // load 100Hz counter into timer
  TBCCTL0 = 0x0080;
  TBCCTL1 = 0x8114;             //  asynchronous capture; negative edge 
sensitive
  TBCCTL2 = 0xc914;
  TBCCTL3 = 0xc914;
  TBCCTL4 = 0x8104;             //  set Compare mode and set mode to OUTX
  TBCCTL5 = 0x0200;
  TBCCTL6 = 0x0204;             //  description : page 11-32

  ui_wait_counter1 = 5;         // Initialize the count down timer with 5 
(cycles of 10,3 ms with 8 MHz quartz, 17 ms without quartz.).

  for (;;)
  {                             //infinite loop
    P1OUT = ~P1OUT;             //invert port 1
    wait_while_not_50ms ();                    //call delay function
  }
  return 0;
}
--------------------------------------------------------------

Any ideas?

Another problem is gcrt0.S: Sometimes DDD reports that this file is empty or 
things like "line number 37 out of range, gcrt0.S has 1 lines". What does this 
mean?

And DDD often does not show the code where the program has been interrupted. Is 
this the usual behavior?

Rolf F.