I just decided to test to see if MCLK was still running off of DCO so I
reconfigured the DCO to run at max speed (about 3.5Mhz) and found my
instructions were running at that speed too. So my new question is why is
it that when the SELMx bits in BCSCTL2 are set to 11 do I get the DCO for
my MCLK. While running I confirmed that these bits are in fact set.
Here is what my asm lists for the address of BCSCTL2:
00000057 l *ABS* 00000000 BCSCTL1
00000058 l *ABS* 00000000 BCSCTL2
And here is what GDB says is there:
(gdb) p /t *0x58
$1 = 11001000
but under these conditions I'm still getting the DCO for the main clock.
Thanks,
-Chris
On Wed, 14 Jul 2004, Christopher Takahashi wrote:
> Hello everybody,
>
> I'm having some trouble with my MSP430F1132.
> I am initializing my Basic clock module with the following and have a 4MHz
> crystal attached. My MSP430 is running from JTAG power at 2.5V.
>
>
> #define BCSCTL1_INIT XTS
> #define BCSCTL2_INIT SELM0|SELM1|SELS
>
> BCSCTL1 = BCSCTL1_INIT;
> BCSCTL2 = BCSCTL2_INIT;
>
> When I set P1.4 to its peripheral mode I get SMCLK out and I see 4Mhz on my
> scope at that pin. When I instruct the MSP430 to toggle P1.0 I get an on
> period of 40uS. It takes 3 cycles to toggle the bit so that period should
> correspond to 3 CPU cycles or 1 cycle of 13uS. This yields a frequency of
> 75KHz. Clearly if my SMCLK and my MCLK are clocked from the same source
> the two calculated frequencies should be consistent. I have also used two
> different F1132s in the same circuit with no difference.
>
> Additionally I have a timer interrupt configured to happen every mS which
> gets successfully executed at the proper frequency.
>
> If for some reason my instructions are being executed at 75kHz I have a
> big problem. Does any one know whats up?
>
> Below is the code for my bit toggle loop.
>
> while (1) {
> P1OUT = 0x03;
> e0b6: f2 40 03 00 mov.b #3, &0x0021 ;#0x0003
> e0ba: 21 00
> P1OUT = 0x00;
> e0bc: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00
> e0c0: fa 3f jmp $-10 ;abs 0xe0b6
> }
>
>
>
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