Sébastien Taylor wrote:
Hello, I am having a strange problem getting the MCLK to work with an
external 8Mhz XT2. I've set it up along with SMCLK to source from the
XT2, and SMCLK works great at 8Mhz, but the MCLK will only run at 6Mhz.
Does anyone have any ideas?
_BIS_SR(OSCOFF); /* Disable LFXT1CLK (32Khz) */
SCFI0 = FN_8;
FLL_CTL1 = SELM_XT2 | SELS;
P1DIR = 0x12;
P1SEL = 0x12;
i'm not sure how exactly it is on the 4xx parts which you seem to use,
but for the 1xx parts:
look in the TI manual, application notes or examples on how to start up
a crystal. there is also a recent thread in this mailinglist concerning
that.
hint: you need a delay loop that tests and clears OFIFG. while that bit
is set, MCLK will be sourced from the DCO no matter what you have set up
in the BSCCTL regs, i'd guess the 4xx parts have a similar behaviour
chris
