hi, sorry to bother you again guys. but im really stuck on this. even after disablign the ints, im getting interrupts.
the system consists of two olimex stks each having a msp430x449. both the boards are connected via their ext ports. using only 2 lines to communicate P2.Bit3 and P2.Bit4. the master runs bcoz of a gpio int on the clk and sends out bits on the data line. the slave simply waits for gpio ints from the master. the clk always runs in perfect sync on both the master and the slave. in the slave: when i rcv the first data int, (transtion on data lien from high to low), i enable the clk interrupts. and now the slave receives bits as the master sends them on the data line. however, even though ive disabled interrupts on the data line, as soon as there is a transition on the data line, the interrupt handler gets called. but that should not happen. why? bcoz of this: the master updates the data line only when the clk is low. and the slave only enables interrupts on the data line for the duration that the clk is high. so under normal conditions, the slave must not detect an int on the data line while the clk is high. and while the clk is low, the data ints are disabled. only as an indication of a STOP does the master change the data line, from low to high while the clk is also high. this is the only time, that the slave must detect a data int (after the initial start condn). but the slave goes into the interrupt handler for the data line, at the 1st transition (after the initial start) even though the transition occurs only when the clk is low and the ints are disabled. any help on this topic will be greatly appreciated. thank you, karan CM II Resolution Systems Inc.
gpioints.tar.gz
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