Grant Edwards schrieb:
I've been looking at the code generated by avr-gcc 3.4.5, and
it sure looks like there's a lot of extra overhead involved in
ISRs. Let's write an ISR that just toggles a port pin every
time the interrupt happens.
you're posting that to the mspgcc mailinglist, don't expect too deep
insight in the AVR architecture from us ;-)
> That generates _18_words_ of code.
[... MSP430 related example cut]
I have no clue, but it could be that the processor uses segmented
memory, and that __SREG__ selects the page with the memory mapped
peripherals?
83:modem.c **** ISR(INT0_vect)
84:modem.c **** {
236 .LM25:
237 /* prologue: frame size=0 */
238 006c 1F92 push __zero_reg__
239 006e 0F92 push __tmp_reg__
240 0070 0FB6 in __tmp_reg__,__SREG__
241 0072 0F92 push __tmp_reg__
242 0074 1124 clr __zero_reg__
243 0076 8F93 push r24
244 0078 9F93 push r25
245 /* prologue end (size=7) */
85:modem.c **** PORTA ^= 0x01;
247 .LM26:
248 007a 8BB3 in r24,59-0x20
249 007c 91E0 ldi r25,lo8(1)
250 007e 8927 eor r24,r25
251 0080 8BBB out 59-0x20,r24
252 /* epilogue: frame size=0 */
253 0082 9F91 pop r25
254 0084 8F91 pop r24
255 0086 0F90 pop __tmp_reg__
256 0088 0FBE out __SREG__,__tmp_reg__
257 008a 0F90 pop __tmp_reg__
258 008c 1F90 pop __zero_reg__
259 008e 1895 reti
260 /* epilogue end (size=7) */
261 /* function __vector_1 size 18 (4) */
86:modem.c **** }
