----- Ursprüngliche Nachricht -----
Von: Sergei Sharonov
An: GCC for MSP430 - http://mspgcc.sf.net; [email protected]
Gesendet am: 07 Apr 2009 20:03:50
Betreff: RE: [Mspgcc-users] changes of the memory mapping for family x5xx
>> -----Original Message-----
>> Good point. But what should one do in low power applications
>> where the µC is _most_ of the time in LPM3? Eg my
>> application allows LPM3 durations of 16s. How does that fit
>> with a WDT with 1s timeout?
>You may clear WDT from periodic interrupt, say your system tick if you
>have one. Higher level task tells ISR how many times (ticks)
>it can keep clearing WDT without being pinged from that task.
>Obviously your system will have to wake up from LPM3 to service
>tick ISR and tick needs to be shorter than 1s.
That's exactly how I implemented it on my systems (currently 5 different
product lines for industrial use), even if they do not enter LPM at all.
Some functions may take longer than the 32ms possible, so I check a global
variable in my 1ms timer tick function, and if it is below a certain limit, I
increase it and reset the wdt.
The checkpoints in the main code just reset this variable to zero.
This extends the maximum application WDT trigger interval to some years (if
using a 64bit variable ;) ) while quickly reacting to a blocked timer tick.
The only disadvantage of this approach is that there is no hardware password
protection for resetting the variable.
JMGross
