Info segment A IS locked by default, while it does not hold any valuable data 
anymore. (and on those devices which DO hold valuable data, it is not protected 
at all). Maybe two different improvements in the design have 
crossed here, making one of them mostly obsolete again. You can still use the 
InfoA segment for device-specific data that shall not be erased during a 
firmware update. If supported by the programmer. (I guess, TI will 
get some advantage for selling their own programmers by this)

The TLV table at 1xa00 is indeed an improvement as it tells not only 
calibration data but also lists the available modules. This could be useful for 
libraries which can see whether there are 2 or 4 USCI modules available 
etc. Since it does not provide information about the port mapping of the module 
signals (there's no mapping controller for the 54xx, even if it is listed in 
the newest family guide, where you could read this kind of info from), 
the use is limited, and the application software already needs to exactly know 
which peripherals are connected to which pin, so the TLV is pretty much useless.
Except for the unique processor ID and the ADC calibration values.

All I can think of is a program that automatically generates a proper 
master-includefile for a new processor by reading the processor type and the 
available modules and their positions from the TLV structure.

The CAL_x values are no more needed for processors with an FLL module and an 
internal calibrated REFO. Therefore they dumped them. On MSPs with FLL+ module 
without internal REFO you'll still need them in case 
you don't have an external watch crystal available.
IMHO, the universal clock system on the 54xx has removed all former drawbacks 
of previous clock module types. DCO can now reach maximum frequency, ACLK and 
SMCLK can be sourced form any clock, FLL is 
there and an itnernal reference and also a fallback source for the WDT, the VLO.

JMGross

----- Ursprüngliche Nachricht -----
Von: Hans Nieuwenhuis
An: mspgcc-users@lists.sourceforge.net
Gesendet am: 27 Mai 2010 20:40:38
Betreff: Re: [Mspgcc-users] Linker script for msp430x54xx

Hi,

Thanks for the explanation about infomenobits.

However I am not so sure about the the special purpose of info segment A.
It can be seperately locked though.
According to the user manual there is a newer method implemented in the
5xx devices which is located at 0x1a00 and further. This table is a lot
more comprehensive and contain the calibrated ADC offsets.
Furthermore the clock system has changed and is now accessed using
UCSCTL0 - UCSCTL8. The old CAL_DCO_* and CAL_BC1_* pointers do not apply
anymore. FLL is done inside the FLL now.

Regards,

Hans


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