Yes, that extra-underscore fix is in the 20100815 release. I'm really unmotivated to continue to patch the hand-written header files (and no, the peripherals do not stay in the same place, and it's hard to determine where they're going to end up from general chip family information). The TI headers are much more likely to be correct.
However, th.ln if you'll please open a ticket on the mspgcc project, and post in that ticket a tar file containing all your suggested changes (rather than a separate email with each one in an attachment, which is really inconvenient), I'll review them for integration into an upcoming release. Peter On Wed, Sep 8, 2010 at 9:43 AM, William "Chops" Westfield <[email protected]> wrote: > > On Sep 8, 2010, at 2:28 AM, thln wrote: > >> PS : Don't hesitate to correct the document if you found some mistakes > > > * 2009-09-08 - THLN > * - definition updated with flexible base address > > #define TA0CTL_H_ __MSP430_TA0_BASE__ + 0x1 /* TA0 > Control Register Hi */ > > As a general practice, shouldn't such constructs be parenthesized to > prevent "surprises" if the macros are used in a more complicated > arithmetic expression? > #define TA0CTL_H_ (__MSP430_TA0_BASE__ + 0x1) > Now, these are not popular symbols to use in a end-user program, and I > don't think they'll cause problems within the context of the existing > usage, but it never hurts to be careful... > (applies to all these edits, I think.) > > (hmmph. An here I was recently admiring that MSP430 peripherals > stayed in the same place across all the chips. Sigh.) > > >> /* TimerA IV names */ >> #if defined(__MSP430_HAS_TA3__) || defined(__MSP430_HAS_TA2____) >> #define TAIV_NONE 0x00 /* No interrupt pending */ >> #define TAIV_CCR1 0x02 /* Capture/compare 1 TACCR1 CCIFG >> Highest */ >> #if defined(__MSP430_HAS_TA3__) >> #define TAIV_CCR2 0x04 /* Capture/compare 2 TACCR2 CCIFG >> */ >> #endif /*__MSP430_HAS_TA3__*/ >> #define TAIV_OVERFLOW 0x0A /* Timer overflow TAIFG Lowest */ >> #endif /*__MSP430_HAS_TA3__ || __MSP430_HAS_TA2__*/ > > You're missing the recent fix here (or is that not in yet?) > > BillW > > > ------------------------------------------------------------------------------ > This SF.net Dev2Dev email is sponsored by: > > Show off your parallel programming skills. > Enter the Intel(R) Threading Challenge 2010. > http://p.sf.net/sfu/intel-thread-sfd > _______________________________________________ > Mspgcc-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/mspgcc-users >
