----- Ursprüngliche Nachricht ----- Von: João Gonçalves An: msp...@grossibaer.de; mspgcc-users@lists.sourceforge.net Gesendet am: 10 Aug 2011 18:32:51
>> About the DCO and the FLL, keep in mind that the DCO (on the 5x series) has >> only 256 different >> possible output frequencies (older ones have less!). >> Chances are, that your desired one is not directly available. Also, on each >> MSP they are different. >> So the DCO has an option to switch between two frequencies (the programmed >> and the next >> higher one) based on a 32 step pattern, the modulation. So you get 7936 >> more >> frequencies, but only as average over 32 clock cycles. This means a clock >> jitter of 2..12% between >> two individual clock pulses. > I'd like to better understand this, where does the 7936 come from? Do you > know this form the data sheet? Simple math (but still wrong :) 256 DCO frequencies * 31 additional (32 total) modulation settings = 7936 more 'interpolated' frequencies. However, the calculation is wrong. 8 of the 256 DCO frequencies cannot be modulated (if DCOx=31), so there are only 248*31 = 7688 more interpolated frequencies (7944 total). The factors come from the DCO register description in the 5x family users guide (and the description of the clock module). >> Why do you want to keep FLLD=2 and FLLREFDIV=1? > Well I got it wrong when I wrote that, I wanted the default value of D to > continue at 2, and the FLLREFDIV value to divide by one, so FLLREFDIV = 0 :) > This is because I wanted to change the DCO frequency and keep DCOCLKDIV > always half of DCOCLK. Okay, it adds some programming comfort at the expense of less precision and/or less adjustment speed. :) >> In case you wonder how I got the DCORSEL info: for a guaranteed >> availability of a frequency at a specific RSEL value, >> you'll have to pick the max value in the DCORSELx=y and DCOx=0 >> line and multiply it with the max DCO stepping. The desired frequency >> be equal or higher. And it must be lower than the min value in the >> DCORSELx=y and DCO=31 row beneath. > I didn't understand this. By max DCO stepping you mean the 32 step pattern? Not pattern (the modulation uses a pattern). The datasheet contains an info of how much two adjacent DCOx values differ in frequency. DOCx+1 = y*DCOx It is a factor in the range of 1.02 and 1.12 I think (not looking at the datasheet now) So worst case, the first DCOx value that doesn't set the fault bit is 1.12 times larger than the max value printed for DCOx=0. >> btw: what do you mean with DVS? Dynamic Voltage Scaling? >> Digital Video Services? Digital Voice System? Doppler Velocity Sensor? >> Digital Voltage Source? Data Voice Switching? >> (I already skipped the obviously nonfitting definitions) :) > Sorry , it's Dynamic Voltage Scaling. My best guess was Digital Voltage Source :) > The purpose is to implement some components in TinyOS that provide an > interface to change to any desired frequency, and that automatically ajusts > the core for it's minimum voltage required for that frequency. Good luck. I made all my 'OS' code myself, including the scheduler. Mostly because I started with a tiny 1232 with 256 bytes ram and 8k Flash, so the code library with the base functions was already there when we switched to a larger MSP that would have been able to host an OS (even a tiny one). It's more effort to implement the basic funcitonality but easier to add to it, compared to using a preprogrammed collection. ------------------------------------------------------------------------------ Get a FREE DOWNLOAD! and learn more about uberSVN rich system, user administration capabilities and model configuration. Take the hassle out of deploying and managing Subversion and the tools developers use with it. http://p.sf.net/sfu/wandisco-dev2dev _______________________________________________ Mspgcc-users mailing list Mspgcc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/mspgcc-users
