----- Ursprüngliche Nachricht -----
Von: Peter Bigot
Gesendet am: 26 Apr 2012 23:31:19

> The first draft of the design specification for 20-bit support in
> mspgcc has been added to the wiki at:

Great news. Thanks for all your work.

One thing I want to bring to your attention is a thread we had in
the TI E2E forum a few weeks ago.
The topic was a suspected compiler/processor bug when using
function pointers from an array.

It turned out, that the CALLA instruction has a problem with the
straightforward approach with indexed addressing:
It isn't obvious, that the register part, which is predestined to hold
the variable index into the array, actually is the base address
(20 bit), whiel the immediate part, which is the only thing that 
can be filled by the linker, is actually a _signed_ 16 bit index.
And when adding the two, the index is sign extended.

So if the location of the (constant) array was above 32k, the
target address was fetched from 0xfxxxx instead of 0x0xxxx.
(of course a vacant memory address).
The immediate part of an indexed CALLA (or MOVA)
instruction therefore has only 15 usable bits, if it is meant
to be an (relocated) address.
Same is true for the MOVA instruction (and data pointers),
but there MOVX.A could be used instead.

As a result of the discussion, indexed use of CALLA should 
be avoided. Better use MOVX.A to load the final address
into the register that holds the index (if optimization allows this)
and use CALLA in register mode.

Apparently, nobody of the CCS compiler crew noticed this before.
(perhaps because all of their arrays during testing were in ram,
which is below 32k on all MSPs I know).

JMGross

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