I have a question about instruction reordering in the compiler.

In this blog
It says that a compiler barrier should be used where writes to memory must not 
be reordered. 

My MSP430 code is all bare metal, foreground-background code and I am not using 
any type of RTOS, so it could be considered lock-free.

Anyway, a new employee at my work pointed out that the compiler is free to 
reorder my memory writes, even those marked volatile. I said that I had never 
actually seen mspgcc do this, but now I am curious: will mspgcc reorder memory 
writes, eg to global variables?
Is this dependent on the msp430 side of gcc (the backend), or more on the 
AST/RTL side?

Or to put it another way, should I be reviewing my shared (between background 
and ISR) variables and placing compiler barriers where variables must be stored 
in an exact order?

I am using a very old version of mspgcc, 3.2.3, I think it was the last stable 
Windows binary release before the CPUX instructions started making their way 
in, sorry I don't know the version, from 2008/2009 maybe?

- Wayne

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