Shevek <[EMAIL PROTECTED]>wrote
in reply for CLAUDIO MASSAO KAWATA :
>> Third (the first really MSX related topic): does anybody know
>> how the Z80's "R" register works? It controls the "REFRESH" sign
>> of the CPU, but when is it generated?
Ok, refresh cycle occours when M1 turns high, for 2 cycles T
of CPU (Signetics Z80 family data sheet) after fetch cycle.
Fetch cycle is the cycle(s) of instruction aquisition.
>> When it counts "zero"? It
>> wouldn't be very smart, 'cause the register can be set by soft...
>> So...?
>The R-register is increased after every refresh, for old memory-modules.
OLD ???? For EVER dinamic memmory. Only SRAM don't need them.
Try this program:
INIT: DI
LD A, F0
OUT (AA), A ; Line zero of keyboard matrix
Destruction:
LD R, A
IN A, (A9)
CPL
JP Z, Destruction
EI
RET
If you press "0-7" keys quickly (no more delay than 3 secs),
your MSX returns at operation prompt. Maybe you entire RAM
use NovRAMs ICs for retain valid data ...
>They had to be refreshed in parts. For the module, to see which part would
>be refreshed, the code would be on the data-bus (or the lower 8 bit of the
>address bus, I don't remember).
Lower 7 bits of address bus (A0-A6) are used to select the
row of memmory cells "refreshed". During the cycle, the
A8-A15 carry contents of bits 0-7 of I register.
>This is what the Refresh-register (R for
>short) is used for. I believe a refresh is done once every machine cycle,
>so you can calculate the value of R.
Machine cycle period is T (1/clock). Ex:
" LD A,B " needs 4 T-cycles for execution, 1 M1-cycle inside;
" LD A,(HL) " needs 7 T-cycles, 2 M1-cycle inside;
" INC (IX+dd) " needs 23 T-cycles, 6 M1-cycle inside.
> I don't see the use of setting the
>R-register, except if you program a Z80 (not a MSX) without memory and you
>need just one more byte.
"R" improved (automatic) auto-increment.
Why not use for "time/delay" counter when DI (interruption
disable) on subroutines ?
>If you use it as memory, you really have to watch
>your timing very much. Mostly it is used as a random generator(...)
The brazilian game "Orpheus" (like Space Invaders/Hype)
explain these technique (Ed. Aleph).
>The Z380,
>which will most probably be the CPU in the next MSX (if there will be
>any), does not change the value of R.
On Z180 register R counting M1 cycles, but R not used on refresh.
Z380/Z382 also implements R register.
(sorry for my bad english)
Regards from Brazil,
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