Oh, that is relatively easy.
 
You need address A0-A7 decoding (with chips like 74LS138 or 688) combined with RD, WR, IOREQ, MI etc. to select a i/o address range and feed that select signal in the cip (like vdp) select input (which will put the databus of the chip from tristate to active when in read).
 
And if the chip has more addresses then you need the A0-An feeded to the chip also.
And the databus of the chip connected to the slot databus. Avoid dataline buffers, most of the time they will introduce nasty delays.
 
 And feedback to busdir if you do a read!
 
 
 

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