Hi John
Im interested in 2 boards
Thanks
Doug Wood
On Saturday, 1 March 2014 23:56:40 UTC-5, monahanz wrote:
>
> About September of last year Andrew and I put together an S100 bus
> Master/Slave 80286 CPU board. This board was designed to allow one to run
> CPM86 and MSDOS in the S-100 bus.
>
> As we started to consider and plan for future CPU’s for the bus and
> software/hardware to run with them, it became clear that it would be
> nice to have the capability with CPU’s in slave mode to transfer control
> down one more level. This would allow you to run a slave with for
> example a DMA controller, or temporally pass control to another CPU without
> going up a level and program the bus master to take care of things.
> Particularly
> because in almost all cases the bus master would be a slow 64K Z80 CPU.
>
> The approach used was to simply duplicate the IEEE-696 protocol again
> using two unassigned S100 lines (NDEF1 & NDEF3). Keeping the same
> handshaking protocols etc. We implemented this with our 80286
> master/slave CPU board here and are calling this the V2-80286 CPU board.
>
> A brief description of this V2 board can be found here:-
>
>
> http://s100computers.com/My%20System%20Pages/80286%20Board/80286%20CPU%20Board.htm#V2-80286
>
>
> (Bottom of the page).
>
> This is probably the most complex board we have done to date, definitely
> not for everybody! It should not be attempted by somebody starting off
> with these types of boards.
>
> I will now go ahead and get a few (3 or 4) commercial quality boards made
> for my own use. If you think you are up to utilizing a board like this
> now, or in the future, let Andrew or I know so we can include you in the
> early “first batch”. Otherwise stay tuned for a later group purchase by
> (hopefully) a group member that will organize a larger purchase - at a
> lower price.
>
> Note, if you already have the original V1 80286 board, all the chips on
> that board can be transferred to this new board.
>
> BTW, all our planned future 16 and 32 bit CPU’s will incorporate this new
> circuit/protocol.
>
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