Hi everyone!
Today I received the last component needed to get my EPROM/RAM board V1 
together. My plan is to use it as a RAM board for my 6502 v1 CPU card.
I brought the card together, configured the switches and... nothing. The 
card did not work, so I started investigating and found something very 
interesting:
I'll describe it referencing the schematics for the 6502 v1 board found 
here 
(http://s100computers.com/My%20System%20Pages/6502%20Board/Printing%20S100_6502-sch1.pdf)
 
and for the EPROM board here 
(http://s100computers.com/My%20System%20Pages/PROM%20Board/Printing%20S100_EPROM-sch%20(V2%20Final).pdf).

The EPROM/RAM board decodes the IO_REQUEST signal ORring between sOUT, sINP 
and sINTA (see on the middle-left on the schematics). IO_REQUEST (when low) 
is then used to generate the CS* signals for the onboard ram/flash/whatever.
Much to my surprise, i noticed IO_REQUEST came out as always high! I traced 
the problem to U1B (a 74LS32) doing an OR between the output of U1A (made 
using sOUT e sINP, which pulses high and low correctly) and sINTA. sINTA is 
not generated by anything on my system (as you can see in the 6502 v1 
schematics it is not connected) and the LS32 doesn't like this: the output 
of the OR operation is always true, which I think is wrong and causing the 
board not to work correctly

My first idea was to add a jumper on the proto-zone of the 6502 CPU card, 
giving the option to tie sINTA line to ground, but I'm afraid I might have 
misunderstood the purpose of the circuit and risk doing any damage (Yep, 
still a newbie :-) ). Any idea/opinion/advice?

Bye!
Fabio

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