Court the 74ALS520’s show for P=Q, 15 ns (max 33ns) on the TI datasheet. This is actually worse than the 74LS682’s, 13 ns, max 25 ns.
I would rather not use the F512’s (6.6 ns, max 10ns). The pull-up resistor network not only tales up more space but seems to make things difficult for the Freerouter to reduce overall board trace lengths. For simple boards not a problem, but on our more complex CPU boards etc. it’s an issue. I rarely use P>Q. I do on the 80386 RAM daughter board for protected memory (> 16M) addressing – as an option -- since it is the wild west space wise, and it would allow you to adders a block at an oddball location. From: [email protected] [mailto:[email protected]] On Behalf Of curt mayer Sent: Monday, July 21, 2014 12:10 AM To: [email protected] Cc: [email protected] Subject: Re: [N8VEM-S100:4650] hot rodding (really 74ls682) argh. to think my parts box has unobtainium in it! nobody sells f520's any more... I've looked into the 8 bit comparator thing pretty hard, and the ALS520's still exist at ti, and they have a significant edge on the ls682's, although not at much as the F520's. if you had external pull-ups, then the F521s could be used, at a smoking 7ns typical. mouser had both F521's and ALS520's. when do you use the P>Q output? On Sunday, July 20, 2014 3:02:31 PM UTC-7, monahanz wrote: Good point Curt, and definitely not a whine. I had not really looked at the F520’s before. To some extent you are comparing apples to oranges. For P=Q on the LS682’s the typical delay is 13 ns, max 25 ns (TI datasheet). For P=Q for the F520 its 5 and 5.5. However that’s a 74Fxx part, I cannot find a corresponding LS520 datasheet. The delay is more a function of the 74LS/74F part rather than the internal chip layout. A brief look on the web did not turn up 74F682’s or 74ALS682’s. If they exist, I bet they would be comparable to the 520. Where are you getting your F520’s from BTW. Going forward, since I really use the LS682 pin 1 (used for P>Q), we could have a jumper to allow either chip on the board. John From: [email protected] <javascript:> [mailto:[email protected] <javascript:> ] On Behalf Of curt mayer Sent: Sunday, July 20, 2014 2:09 PM To: [email protected] <javascript:> Subject: [N8VEM-S100:4644] hot rodding (really 74ls682) A lot of these designs want to be pushed a little for clock rate, and It feels really odd sticking a slow part like a 'ls682 in my critical address decode path, especially when it's cascaded like in the rom/ram board. sticking 35 ns memory in there and then blowing another 30 ns just to decode the address lines to get a chip select will keep you from running at 10mhz without wait states. an 'F520 will do the same job in half the time, if you ground the unused p>q output; so all my '520s in '682 sockets have pin 1 lifted and wired to ground with a scrap of kynar. and my chip selects come out 10ns earlier. it this just a whine? I really dislike the '682, since you can't get any faster parts with this pinout that have the internal pullup. --curt, on a quest for a 12mhz s100 0WS z80. -- You received this message because you are subscribed to the Google Groups "N8VEM-S100" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected] <javascript:> . For more options, visit https://groups.google.com/d/optout. -- You received this message because you are subscribed to the Google Groups "N8VEM-S100" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout. -- You received this message because you are subscribed to the Google Groups "N8VEM-S100" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
