FWIW,  I’m actually working on a V2 version of this board. It’s GAL based (5) 
but it better takes care of the subtle timing issues of pDBIN and pWR* that are 
generated for the S100 bus.  The Intel chip signals come up too soon and hang 
on too long.  With GALs you will have more control or the timing.  

 

Stay tuned

John

 

 

 

From: [email protected] [mailto:[email protected]] On 
Behalf Of Gary Kaufman
Sent: Tuesday, March 3, 2015 10:45 AM
To: [email protected]
Subject: Re: [N8VEM-S100:6501] Re: 80386 CPU Board - A possible solution

 


One more bit of follow-up

I had mentioned that I could not get the Texas Instruments version 
(TX486DLC/E-40GA) to work.  Turns out that the problem was that for some reason 
the TX486DLC/E needs more wait states than the AMD386DX to work properly in my 
system.  I needed 7 wait states for both IO and RAM at 33 mhz to allow DOS to 
boot reliably.

The TX486DLC/E may be a useful option for some folks as it seems more common 
and inexpensive than the Cyrix CX486DLC/E versions.  

- Gary


On Friday, February 20, 2015 at 12:21:49 PM UTC-5, Gary Kaufman wrote:

John -

I added the inverter and the problem is certainly better, but not totally fixed.

I can now properly switch 80386<-->Z80 using QOEE,01/00 as long as U27 is a 
74F138 or 74S138 and the clock speed of the 80386 is 16mhz or less.  At 18mhz 
or > it still fails.

If I switch to 74LS138 it won't work above 6mhz.  

I/O wait state setting on the 80386 doesn't affect the problem.  CPU is an 
AMD80386-40

I'm comfortable we've isolated the area of the problem.

- Gary

On 2/19/2015 1:51 PM, John Monahan wrote:

Gary, took another look at this V2 SMB,  U33, the 74LS175 is clock triggered on 
the rising edge. The signal coming from U31B (pin 6) may be arriving too late 
and somehow the data bus has lost it by the time it rises into U33.   I’m 
seriously considering doing a V3 SMB using a few GAL’s and more functionality, 
since I don’t have your problem could you check if this is the problem. 

 

We will invert the signal coming from U31 pin 6, so the start of the rising 
pulse will latch the data lines into U33.  Fortunately the is a spare gate on 
the board U10B,  a 74LS00.  Jumper its pin 4 to Vcc. Bend out pin 6 of U31B. 
Jumper this pin to pin 5 of U10. Jumper U10 pin 6 to pin 9 of U33.   Then see 
if you can get home with the 80386.

 

 

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