I don't have a clue what my CPU instructions look like.
The NIOS ISA is a very simple load/store architecture. NIOS is optimized for a decent implementation in an FPGA and thus it's not very fast. With a Cyclone 3 it runs at most at some 125 MHz. My 100 MHz NEEK design measured in a Linux application results in some 50..75 DMIPS.
OTOH you can implement custom instructions that might speed up certain operations.
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