On Jul 18, 6:19 pm, threeneurons <[email protected]> wrote: > Way back when, when I was 1st learning to program microprocessors (uP, > not a uC=microcontroller), one of the 1st lab assignments was a > 'debounce algorithm'. Basically a little code that could be finished, > and tested, in a 1-hour period. Here are a few links on this important > snippet of code that you should keep in your programming tool kit: > > http://www.labbookpages.co.uk/electronics/debounce.htmlhttp://www.ganssle.com/debouncing.htmhttp://hackaday.com/2010/11/09/debounce-code-one-post-to-rule-them-all/ ...
Hmm - I always likes the "vertical slice counters" - a type of digital filter - multiple keys/buttons/whatever in a single pass. A fantastic technique that would incinerate the mind of most so-called programmers. I wrote an implementation of the idea for PICs back in 2003 - my comments should explain the principle (I tend to comment a lot in my code, especially when using novel approaches). You might want to display the following in a fixed width font so that the tables line up. The code is simple and concise, the concept slightly less so. // File : xxxx.c // Author : Nick de Smith // // Revision Date By Reason // X0.1 11/09/03 NMdS First attempt // // KeyDeBounce // // The purpose of this routine is to debounce, i.e. digitally low pass filter // inputs. The algorithm handles upto 8 bits at a time. An input is considered // filtered if it has not changed states in the last 4 samples. // // 2-bit cyclic vertical counters count the 4 samples. As long as there is no // change, the counters are held in the reset state of 00b. When a change is detected // between the current sample and the filtered or debounced sample, the counters // are incremented. The counting sequence is 00,01,10,11,00... When the counters // roll over from 11b to 00b, the debounced state is updated. If the input changes // back to the filtered state while the counters are counting, then the counters // are re-initialized to the reset state and the filtered state is unaffected. // In other words, a glitch or transient input has been filtered. // // The 2-bit counters are arranged "vertically". In other words 8 counters // are formed with 2 ubytes such that the corresponding bits in the ubytes are // paired (e.g. MSBit of each ubyte is paired to form one counter). // The counting sequence is 0,1,2,3,0,1,... And the state tables and Karnaugh // maps are: // // State Table: Karnaugh Maps: // pres next B // SS SS 0 1 // AB AB +---+---+ +---+---+ // -------- A 0| | 1 | | 1 | | // 00 01 +---+---+ +---+---+ // 01 10 1| 1 | | | 1 | | // 10 11 +---+---+ +---+---+ // 11 00 A += A ^ B B += ~B // // Here's the PIC code that implements the counter: // MOVF SB,W ; W = B // XORWF SA,F ; A += A ^ B // COMF SB,F ; B += ~B // 14 instructions // 15 cycles // Inputs: // ubNewSample - The current sample // Outputs // gbKeyState - The current value (filtered version of csa) // // RAM used // ubCountA, // ubCountB - State variables for the 8 2-bit counters // Have fun Nick -- You received this message because you are subscribed to the Google Groups "neonixie-l" group. To post to this group, send an email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/neonixie-l?hl=en-GB.
