On 8/15/2012 11:18 AM, John Rehwinkel wrote:
A couple of years ago just for fun I started from
scratch and designed a nixie clock circuit from the
ground up (pun intended), that uses (6) 74HC160 counters.
How do you do the divide-by-6 digits? Just use gates to reset the counters
when they get to 6? I'm more used to using 7492 counters for that task, so
I'm curious.
- John
Synchronous counters will accept a parallel data input and/or a reset signal.
The tricky part is going from 12 to 01. You have to issue a load command with
0001 on the data bus to set it to 1.
The '160 has an asynchronous reset, while the '162 has a synchronous reset. So
the logic would be slightly different for those two parts.
The advantage of synchronous counters is that you don't get glitches, and if you
do, they don't matter since the signals are only sampled on the rising edge of
the clock.
It's not so important for a time-of-day clock, but designing circuits to work at
a hundred MHz is a lot easier with synchronous logic.
--
David Forbes, Tucson, AZ
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