Don't worry about it.
This is a CMOS 5V signal, I presume. It only has one load, at the far end
of the trace. You do not say what the frequency is, so I will guess that
it's on the order of 5-20 MHz.
The signal integrity is important, to prevent ringing that would
double-trigger the load circuit. A non-terminated transmission line will
have a reflection, whose size is a function of the sharpness of the rising
or falling edge, and the length of the trace.
The output transition time of the oscillator (the rise and fall time) is
likely greater than 5 nanoseconds. As long as the trace length is a lot
shorter than the transition time, you don't have to worry about reflection
from the end of the line causing ringing.
FR4 has a propagation delay of 2ns/foot, based on its dielectric
coefficient of ~4.5. So a trace up to one foot long will 'swallow' the edge
rather than causing ringing.
I apologize for the slightly hand-waving analysis, but this isn't a
critical case, so a detailed analysis isn't needed.
I recently designed a clock driver circuit board for a 4 GHz spectrometer,
if you're wondering what I do in my day job that makes me think about clock
traces.



On Sat, Dec 26, 2020, 4:53 PM Erick Anderson <[email protected]> wrote:

>
> I designed a board for the 6-digit All Spectrum controller, which uses the
> Dallas TCXO chip. That's what goes in the DIP-14 socket in the picture.
> Right now they're as close to each other as possible. I'm thinking about
> redesigning the board to be a bit shorter, and moving the socket into the
> empty space at the right of the board would help. This would make the clock
> signal trace much longer, but is that actually a problem?
>
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