Hello everybody.
I want to port NetBSD to the MIPS-based Ingenic X1000 series, which is a close
relative to the already-supported JZ4780 (CI20 board). After a few source code
tweaks, I'm able to boot the 9.2 kernel on the hardware. However it got stuck
after probing some of the devices. Personally I only worked with the Linux
kernel in the past years and I'm literally a newbie in the BSD world. So, I
have a few questions.
1. Correct way to add new PRID definitions to locore.h and cputab.
The Ingenic Semiconductor has 4 different company IDs: 0x13, 0xd0, 0xd1, 0xe1.
Currently the NetBSD only has 0xe1. And there are different processor ID
variations. What's the preferred way of adding these processor definitions?
Also, it appears that the NetBSD kernel failed to detect the correct L2 cache
size on the X1000. The X1000 has 128KB 4-way L2 cache, while NetBSD says it's
320KB 5-way.
2. Early resource initialization for different processors.
Currently the `evbmips/ingenic/machdep.c` is hardcoded to use 48MHz crystal,
UART0 as boot console, and 1GB RAM. We need to enable the users to specify
these parameters in some sort of config file, or preferably, FDT. What's the
preferred way?
There are also some variations between the peripherals of different Ingenic
SoCs, for instance, the CPM, OST, SPI and I2S.
What's more, it appears that the debug prints in {mips-}machdep.c are not
working. I'm not familiar with the early console implementation in NetBSD -
does the consinit() need to be called inside mach_init() ?
3. Kernel boot command line.
Sorry for my ignorance, but I never used any *BSD in the past. Does the NetBSD
have a kernel "cmdline"? If so, does it receive the cmdline from U-Boot in the
same way as Linux?
4. Suspend to RAM/disk support
How to implement these low power modes for non-x86 platforms in NetBSD?
5. NetBSD's policy of GPL code.
Support for the Ingenic SoC series is more mature in Linux. Are GPL code
derivatives allowed in NetBSD? Do I have to clean-room them?
Thank you!
Regards,
Mike Yang
