[resend][PATCH net-drivers-2.6 2c/8] e1000: Enable custom configuration bits for 82571/2 controllers.

[Malli Chilakala]

Enable custom configuration bits for 82571/2 controllers. The bits are 
required for correct functionality of these controllers.

Signed-off-by: Mallikarjuna R Chilakala <[EMAIL PROTECTED]>
Signed-off-by: Ganesh Venkatesan <[EMAIL PROTECTED]>
Signed-off-by: John Ronciak <[EMAIL PROTECTED]>

diff -up netdev-2.6/drivers/net/e1000/e1000_main.c 
netdev-2.6.new/drivers/net/e1000/e1000_main.c
--- netdev-2.6/drivers/net/e1000/e1000_main.c   2005-08-04 17:44:43.000000000 
-0700
+++ netdev-2.6.new/drivers/net/e1000/e1000_main.c       2005-08-04 
17:44:45.000000000 -0700
@@ -1150,6 +1150,7 @@ 
                return -ENOMEM;
        }
        memset(txdr->buffer_info, 0, size);
+       memset(&txdr->previous_buffer_info, 0, sizeof(struct e1000_buffer));
 
        /* round up to nearest 4K */
 
@@ -1198,6 +930,7 @@ setup_tx_desc_die:
 
        txdr->next_to_use = 0;
        txdr->next_to_clean = 0;
+       spin_lock_init(&txdr->tx_lock);
 
        return 0;
 }
@@ -1310,6 +1074,19 @@ e1000_configure_tx(struct e1000_adapter 
                (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
 
        E1000_WRITE_REG(hw, TCTL, tctl);
+
+       if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
+               tarc = E1000_READ_REG(hw, TARC0);
+               tarc |= ((1 << 25) | (1 << 21));
+               E1000_WRITE_REG(hw, TARC0, tarc);
+               tarc = E1000_READ_REG(hw, TARC1);
+               tarc |= (1 << 25);
+               if (tctl & E1000_TCTL_MULR)
+                       tarc &= ~(1 << 28);
+               else
+                       tarc |= (1 << 28);
+               E1000_WRITE_REG(hw, TARC1, tarc);
+       }
 
        e1000_config_collision_dist(hw);
 
@@ -1600,6 +1140,14 @@ e1000_setup_rctl(struct e1000_adapter *a
                                1000000000 / (adapter->itr * 256));
        }
 
+       if (hw->mac_type >= e1000_82571) {
+               /* Reset delay timers after every interrupt */
+               ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
+               ctrl_ext |= E1000_CTRL_EXT_CANC;
+               E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
+               E1000_WRITE_FLUSH(hw);
+       }
+
        /* Setup the HW Rx Head and Tail Descriptor Pointers and
         * the Base and Length of the Rx Descriptor Ring */
        switch (adapter->num_queues) {
-
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