As a follow up on this thread:
On 8/30/2016, Geert Uytterhoeven wrote: > > I just looked at the RZ/A1 register space and there seems to be dummy > > registers in the POST1-4 area. I can write to them and read back what I > > wrote...which is all that the sh_eth driver cares about. I bet when the > > designers bring in the EtherC IP block, the entire register address is > > always populated with a simple latch registers. And then, if a feature is > > not included (like relay/POST), then nothing is hooked up on the back side > > of it. > > What a waste of transistors... > There are plenty of hidden registers in many IP blocks. Well Geert, turns out those transistors weren't wasted. They are there...and in fact are need to actually make the system work correctly. After some investigation, looks like when someone was cutting out un-needed pages to make the RZ/A1 hardware manual they misunderstood what those registers were for. In reality, they just needed to copy the pages from the SH7734 Hardware manual for the POST1-4. Also, if you read about the TSU closely you'll see that you also need register FWSLC to actually enable the POST1-4 registers (more or less). I've already submitted a v2 patch which should be pretty straight forward now. Chris
