Add optional property "descs_pool_size" to specify buffer descriptor's pool size. The "descs_pool_size" should define total number of CPDMA CPPI descriptors to be used for both ingress/egress packets processing. If not specified - the default value 256 will be used which will allow to place descriptor's pool into the internal CPPI RAM on most of TI SoC.
Signed-off-by: Grygorii Strashko <grygorii.stras...@ti.com> --- Documentation/devicetree/bindings/net/cpsw.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt index 5ad439f..b99d196 100644 --- a/Documentation/devicetree/bindings/net/cpsw.txt +++ b/Documentation/devicetree/bindings/net/cpsw.txt @@ -35,6 +35,11 @@ Optional properties: For example in dra72x-evm, pcf gpio has to be driven low so that cpsw slave 0 and phy data lines are connected via mux. +- descs_pool_size : total number of CPDMA CPPI descriptors to be used for + both ingress/egress packets processing. if not + specified the default value 256 will be used which + will allow to place descriptors pool into the + internal CPPI RAM. Slave Properties: -- 2.10.1