On Fri, Jun 23, 2006 at 01:15:53PM -0700, Brandeburg, Jesse wrote: > > fails in an unexpected way. The last call invokes ixgb_mac_reset() > > which writes a reset bit, delays a few millisecs, and reads the reset > > bit. The problem I'm seeing is that the read > > > > ctrl_reg = IXGB_READ_REG(hw, CTRL0); > > > > triggers some PCI bus error that off-lines the device. Any hints > > try this patch? it is compile tested.
[...] > IXGB_WRITE_REG(hw, EECD, *eecd_reg); > + IXGB_WRITE_FLUSH(hw); > udelay(50); With such a response, I had high hopes that the patch would work. Alas, it didn't help. I am in the process of rolling back to the driver v 1.0.100, which doesn'thave the problem, to see if I can isolate what changed. --linas - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
