Hi Sean, I love your patch! Yet something to improve:
[auto build test ERROR on net-next/master] url: https://github.com/0day-ci/linux/commits/sean-wang-mediatek-com/add-VLAN-support-to-DSA-MT7530/20171215-214450 config: i386-randconfig-x019-201750 (attached as .config) compiler: gcc-7 (Debian 7.2.0-12) 7.2.1 20171025 reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): drivers/net/dsa/mt7530.c: In function 'mt7530_port_vlan_add': drivers/net/dsa/mt7530.c:1131:6: warning: unused variable 'ret' [-Wunused-variable] int ret; ^~~ drivers/net/dsa/mt7530.c: At top level: >> drivers/net/dsa/mt7530.c:1324:23: error: initialization from incompatible >> pointer type [-Werror=incompatible-pointer-types] .port_vlan_prepare = mt7530_port_vlan_prepare, ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/net/dsa/mt7530.c:1324:23: note: (near initialization for 'mt7530_switch_ops.port_vlan_prepare') drivers/net/dsa/mt7530.c:1325:20: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types] .port_vlan_add = mt7530_port_vlan_add, ^~~~~~~~~~~~~~~~~~~~ drivers/net/dsa/mt7530.c:1325:20: note: (near initialization for 'mt7530_switch_ops.port_vlan_add') cc1: some warnings being treated as errors vim +1324 drivers/net/dsa/mt7530.c 1121 1122 static void 1123 mt7530_port_vlan_add(struct dsa_switch *ds, int port, 1124 const struct switchdev_obj_port_vlan *vlan, 1125 struct switchdev_trans *trans) 1126 { 1127 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; 1128 bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; 1129 struct mt7530_hw_vlan_entry new_entry; 1130 struct mt7530_priv *priv = ds->priv; > 1131 int ret; 1132 u16 vid; 1133 1134 /* The port is kept as VLAN-unaware if bridge with vlan_filtering not 1135 * being set. 1136 */ 1137 if (!priv->ports[port].vlan_filtering) 1138 return; 1139 1140 mutex_lock(&priv->reg_mutex); 1141 1142 for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { 1143 mt7530_hw_vlan_entry_init(&new_entry, port, untagged); 1144 mt7530_hw_vlan_update(priv, vid, &new_entry, 1145 mt7530_hw_vlan_add); 1146 } 1147 1148 if (pvid) { 1149 mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, 1150 G0_PORT_VID(vlan->vid_end)); 1151 priv->ports[port].pvid = vlan->vid_end; 1152 } 1153 1154 mutex_unlock(&priv->reg_mutex); 1155 } 1156 1157 static int 1158 mt7530_port_vlan_del(struct dsa_switch *ds, int port, 1159 const struct switchdev_obj_port_vlan *vlan) 1160 { 1161 struct mt7530_hw_vlan_entry target_entry; 1162 struct mt7530_priv *priv = ds->priv; 1163 u16 vid, pvid; 1164 1165 /* The port is kept as VLAN-unaware if bridge with vlan_filtering not 1166 * being set. 1167 */ 1168 if (!priv->ports[port].vlan_filtering) 1169 return 0; 1170 1171 mutex_lock(&priv->reg_mutex); 1172 1173 pvid = priv->ports[port].pvid; 1174 for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { 1175 mt7530_hw_vlan_entry_init(&target_entry, port, 0); 1176 mt7530_hw_vlan_update(priv, vid, &target_entry, 1177 mt7530_hw_vlan_del); 1178 1179 /* PVID is being restored to the default whenever the PVID port 1180 * is being removed from the VLAN. 1181 */ 1182 if (pvid == vid) 1183 pvid = G0_PORT_VID_DEF; 1184 } 1185 1186 mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK, pvid); 1187 priv->ports[port].pvid = pvid; 1188 1189 mutex_unlock(&priv->reg_mutex); 1190 1191 return 0; 1192 } 1193 1194 static enum dsa_tag_protocol 1195 mtk_get_tag_protocol(struct dsa_switch *ds, int port) 1196 { 1197 struct mt7530_priv *priv = ds->priv; 1198 1199 if (port != MT7530_CPU_PORT) { 1200 dev_warn(priv->dev, 1201 "port not matched with tagging CPU port\n"); 1202 return DSA_TAG_PROTO_NONE; 1203 } else { 1204 return DSA_TAG_PROTO_MTK; 1205 } 1206 } 1207 1208 static int 1209 mt7530_setup(struct dsa_switch *ds) 1210 { 1211 struct mt7530_priv *priv = ds->priv; 1212 int ret, i; 1213 u32 id, val; 1214 struct device_node *dn; 1215 struct mt7530_dummy_poll p; 1216 1217 /* The parent node of master netdev which holds the common system 1218 * controller also is the container for two GMACs nodes representing 1219 * as two netdev instances. 1220 */ 1221 dn = ds->ports[MT7530_CPU_PORT].master->dev.of_node->parent; 1222 priv->ethernet = syscon_node_to_regmap(dn); 1223 if (IS_ERR(priv->ethernet)) 1224 return PTR_ERR(priv->ethernet); 1225 1226 regulator_set_voltage(priv->core_pwr, 1000000, 1000000); 1227 ret = regulator_enable(priv->core_pwr); 1228 if (ret < 0) { 1229 dev_err(priv->dev, 1230 "Failed to enable core power: %d\n", ret); 1231 return ret; 1232 } 1233 1234 regulator_set_voltage(priv->io_pwr, 3300000, 3300000); 1235 ret = regulator_enable(priv->io_pwr); 1236 if (ret < 0) { 1237 dev_err(priv->dev, "Failed to enable io pwr: %d\n", 1238 ret); 1239 return ret; 1240 } 1241 1242 /* Reset whole chip through gpio pin or memory-mapped registers for 1243 * different type of hardware 1244 */ 1245 if (priv->mcm) { 1246 reset_control_assert(priv->rstc); 1247 usleep_range(1000, 1100); 1248 reset_control_deassert(priv->rstc); 1249 } else { 1250 gpiod_set_value_cansleep(priv->reset, 0); 1251 usleep_range(1000, 1100); 1252 gpiod_set_value_cansleep(priv->reset, 1); 1253 } 1254 1255 /* Waiting for MT7530 got to stable */ 1256 INIT_MT7530_DUMMY_POLL(&p, priv, MT7530_HWTRAP); 1257 ret = readx_poll_timeout(_mt7530_read, &p, val, val != 0, 1258 20, 1000000); 1259 if (ret < 0) { 1260 dev_err(priv->dev, "reset timeout\n"); 1261 return ret; 1262 } 1263 1264 id = mt7530_read(priv, MT7530_CREV); 1265 id >>= CHIP_NAME_SHIFT; 1266 if (id != MT7530_ID) { 1267 dev_err(priv->dev, "chip %x can't be supported\n", id); 1268 return -ENODEV; 1269 } 1270 1271 /* Reset the switch through internal reset */ 1272 mt7530_write(priv, MT7530_SYS_CTRL, 1273 SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | 1274 SYS_CTRL_REG_RST); 1275 1276 /* Enable Port 6 only; P5 as GMAC5 which currently is not supported */ 1277 val = mt7530_read(priv, MT7530_MHWTRAP); 1278 val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; 1279 val |= MHWTRAP_MANUAL; 1280 mt7530_write(priv, MT7530_MHWTRAP, val); 1281 1282 /* Enable and reset MIB counters */ 1283 mt7530_mib_reset(ds); 1284 1285 mt7530_clear(priv, MT7530_MFC, UNU_FFP_MASK); 1286 1287 for (i = 0; i < MT7530_NUM_PORTS; i++) { 1288 /* Disable forwarding by default on all ports */ 1289 mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, 1290 PCR_MATRIX_CLR); 1291 1292 if (dsa_is_cpu_port(ds, i)) 1293 mt7530_cpu_port_enable(priv, i); 1294 else 1295 mt7530_port_disable(ds, i, NULL); 1296 } 1297 1298 /* Flush the FDB table */ 1299 ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, 0); 1300 if (ret < 0) 1301 return ret; 1302 1303 return 0; 1304 } 1305 1306 static const struct dsa_switch_ops mt7530_switch_ops = { 1307 .get_tag_protocol = mtk_get_tag_protocol, 1308 .setup = mt7530_setup, 1309 .get_strings = mt7530_get_strings, 1310 .phy_read = mt7530_phy_read, 1311 .phy_write = mt7530_phy_write, 1312 .get_ethtool_stats = mt7530_get_ethtool_stats, 1313 .get_sset_count = mt7530_get_sset_count, 1314 .adjust_link = mt7530_adjust_link, 1315 .port_enable = mt7530_port_enable, 1316 .port_disable = mt7530_port_disable, 1317 .port_stp_state_set = mt7530_stp_state_set, 1318 .port_bridge_join = mt7530_port_bridge_join, 1319 .port_bridge_leave = mt7530_port_bridge_leave, 1320 .port_fdb_add = mt7530_port_fdb_add, 1321 .port_fdb_del = mt7530_port_fdb_del, 1322 .port_fdb_dump = mt7530_port_fdb_dump, 1323 .port_vlan_filtering = mt7530_port_vlan_filtering, > 1324 .port_vlan_prepare = mt7530_port_vlan_prepare, 1325 .port_vlan_add = mt7530_port_vlan_add, 1326 .port_vlan_del = mt7530_port_vlan_del, 1327 }; 1328 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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