On Tue, 2018-03-27 at 11:54 -0700, Alexander Duyck wrote: > As far as I know the code has been this way for a while, something > like 2002, when the barrier was already present in e1000. However > there it was calling out weakly ordered models "such as IA-64". Since > then pretty much all the hardware based network drivers at this point > have similar code floating around with wmb() in place to prevent > issues on weak ordered memory systems. > > So in any case we still need to be careful as there are architectures > that are depending on this even if they might not be x86. :-/
Well, we need to clarify that once and for all, because as I wrote earlier, it was decreed by Linus more than a decade ago that writel would be fully ordered by itself vs. previous memory stores (at least on UC memory). This is why we added sync's to writel on powerpc and later ARM added similar barriers to theirs. This is also why writel_relaxed was added (though much later), since what writel_relaxed does is to life that specific requirement. IE. If what you say is true and wmb() is needed on x86, then writel_relaxed is now completely useless... Ben.