Hi Andrew
> -----Original Message-----
> From: Andrew Lunn [mailto:[email protected]]
> Sent: Friday, October 5, 2018 8:38 AM
> To: Pankaj Bansal <[email protected]>
> Cc: Florian Fainelli <[email protected]>; [email protected];
> Alexandru Marginean <[email protected]>
> Subject: Re: [PATCH 1/2] dt-bindings: net: add MDIO bus multiplexer driven
> by a regmap device
>
> > +i2c@2000000 {
> > + compatible = "fsl,vf610-i2c";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0x2000000 0x0 0x10000>;
> > + interrupts = <0 34 0x4>; // Level high type
> > + clock-names = "i2c";
> > + clocks = <&clockgen 4 7>;
> > + fsl-scl-gpio = <&gpio2 15 0>;
> > + status = "okay";
> > + /* The FPGA node */
> > + fpga@66 {
> > + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c";
> > + reg = <0x66>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + mdio1_mux@54 {
> > + compatible = "mdio-mux-regmap", "mdio-mux";
> > + mdio-parent-bus = <&emdio2>; /* MDIO bus */
> > + reg = <0x54>; /* BRDCFG4 */
> > + mux-mask = <0x07>; /* EMI2_MDIO */
> > +
> > + #address-cells=<1>;
> > + #size-cells = <0>;
> > +
> > + mdio1_ioslot1@0 { // Slot 1
> > + reg = <0x00>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + phy1@1 {
>
> Hi Pankaj
>
> It looks like you have tab vs space issues.
I will fix the formatting error in V2
>
> > + reg = <1>;
> > + compatible =
> > "ethernet-phy-id0210.7441";
> > + };
>
> A blank line after here please.
OK
> > + phy1@0 {
> > + reg = <0>;
> > + compatible =
> > "ethernet-phy-id0210.7441";
> > + };
> > + };
>
> And here
Ok
>
> > + mdio1_ioslot2@1 { // Slot 2
> > + reg = <0x01>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + };
>
> and here.
Ok
>
> Andrew
