From: Kiran Kumar <kirankum...@marvell.com>

This patch adds reading HW limits like number of Rx/Tx stats,
number of queue IRQs supported per NIX LF from AF registers
and sync them to PF/VF.

Signed-off-by: Kiran Kumar <kirankum...@marvell.com>
Signed-off-by: Sunil Goutham <sgout...@marvell.com>
---
 drivers/net/ethernet/marvell/octeontx2/af/mbox.h    | 4 ++++
 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 8 ++++++++
 2 files changed, 12 insertions(+)

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h 
b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 1e362d45..7a229a5 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -398,6 +398,10 @@ struct nix_lf_alloc_rsp {
        u8      lso_tsov4_idx;
        u8      lso_tsov6_idx;
        u8      mac_addr[ETH_ALEN];
+       u8      lf_rx_stats; /* NIX_AF_CONST1::LF_RX_STATS */
+       u8      lf_tx_stats; /* NIX_AF_CONST1::LF_TX_STATS */
+       u16     cints; /* NIX_AF_CONST2::CINTS */
+       u16     qints; /* NIX_AF_CONST2::QINTS */
 };
 
 /* NIX AQ enqueue msg */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c 
b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index e010fe7..c779a0a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -829,6 +829,14 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,
        rsp->tx_chan_cnt = pfvf->tx_chan_cnt;
        rsp->lso_tsov4_idx = NIX_LSO_FORMAT_IDX_TSOV4;
        rsp->lso_tsov6_idx = NIX_LSO_FORMAT_IDX_TSOV6;
+       /* Get HW supported stat count */
+       cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
+       rsp->lf_rx_stats = ((cfg >> 32) & 0xFF);
+       rsp->lf_tx_stats = ((cfg >> 24) & 0xFF);
+       /* Get count of CQ IRQs and error IRQs supported per LF */
+       cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);
+       rsp->qints = ((cfg >> 12) & 0xFFF);
+       rsp->cints = ((cfg >> 24) & 0xFFF);
        return rc;
 }
 
-- 
2.7.4

Reply via email to