On 04/12/2018 20:10, David Miller wrote:
From: Alexei Starovoitov <alexei.starovoi...@gmail.com>
Date: Tue, 4 Dec 2018 11:29:55 -0800
I guess sparc doesn't really have 32 subregisters. All registers
are considered 64-bit. It has 32-bit alu ops on 64-bit registers
instead.
Right.
Anyways, sparc will require two instructions because of this, the
'sra' then a 'srl' by zero bits to clear the top 32-bits.
I'll code up the sparc JIT part when this goes in.
Hmm, I had been going through all JIT backends, and saw there is
do_alu32_trunc after jitting sra for BPF_ALU. That's what needed?
Regards,
Jiong
