On 2/2/21 7:23 AM, Joakim Zhang wrote:
> RX FIFO enable failed could happen when do system reboot stress test,
> one customer reports failure rate is about 50%.
> 
> [    0.303958] flexcan 5a8d0000.can: 5a8d0000.can supply xceiver not found, 
> using dummy regulator
> [    0.304281] flexcan 5a8d0000.can (unnamed net_device) (uninitialized): 
> Could not enable RX FIFO, unsupported core
> [    0.314640] flexcan 5a8d0000.can: registering netdev failed
> [    0.320728] flexcan 5a8e0000.can: 5a8e0000.can supply xceiver not found, 
> using dummy regulator
> [    0.320991] flexcan 5a8e0000.can (unnamed net_device) (uninitialized): 
> Could not enable RX FIFO, unsupported core
> [    0.331360] flexcan 5a8e0000.can: registering netdev failed
> [    0.337444] flexcan 5a8f0000.can: 5a8f0000.can supply xceiver not found, 
> using dummy regulator
> [    0.337716] flexcan 5a8f0000.can (unnamed net_device) (uninitialized): 
> Could not enable RX FIFO, unsupported core
> [    0.348117] flexcan 5a8f0000.can: registering netdev failed
> 
> RX FIFO should be enabled after the FRZ/HALT are valid. But the current
> code set RX FIFO enable and FRZ/HALT at the same time.
> 
> Fixes: e955cead03117 ("CAN: Add Flexcan CAN controller driver")
> Signed-off-by: Joakim Zhang <[email protected]>
> ---
>  drivers/net/can/flexcan.c | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
> index 038fe1036df2..8ee9fa2f4161 100644
> --- a/drivers/net/can/flexcan.c
> +++ b/drivers/net/can/flexcan.c
> @@ -1803,6 +1803,7 @@ static int register_flexcandev(struct net_device *dev)
>  {
>       struct flexcan_priv *priv = netdev_priv(dev);
>       struct flexcan_regs __iomem *regs = priv->regs;
> +     unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;
>       u32 reg, err;
>  
>       err = flexcan_clks_enable(priv);
> @@ -1825,10 +1826,19 @@ static int register_flexcandev(struct net_device *dev)
>       if (err)
>               goto out_chip_disable;
>  
> -     /* set freeze, halt and activate FIFO, restrict register access */
> +     /* set freeze, halt and polling the freeze ack */
>       reg = priv->read(&regs->mcr);
> -     reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT |
> -             FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
> +     reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT;
> +     priv->write(reg, &regs->mcr);
> +
> +     while (timeout-- && !(priv->read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK))
> +             udelay(100);

Please make use of existing functions like flexcan_chip_freeze().

regards,
Marc

-- 
Pengutronix e.K.                 | Marc Kleine-Budde           |
Embedded Linux                   | https://www.pengutronix.de  |
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