On Tue, 2021-04-13 at 20:44 -0700, Jakub Kicinski wrote:
> Report corrected bits.
>
> Signed-off-by: Jakub Kicinski <k...@kernel.org>
> ---
> .../ethernet/mellanox/mlx5/core/en_ethtool.c | 9 ++++++
> .../ethernet/mellanox/mlx5/core/en_stats.c | 28
> +++++++++++++++++--
>
> -#define MLX5E_READ_CTR64_BE_F(ptr, c) \
> +#define MLX5E_READ_CTR64_BE_F(ptr, set, c) \
> be64_to_cpu(*(__be64 *)((char *)ptr + \
> MLX5_BYTE_OFF(ppcnt_reg, \
> -
> counter_set.eth_802_3_cntrs_grp_data_layout.c##
> _high)))
> + counter_set.set.c##_high)))
squint...... looks fine :)
>
> void mlx5e_stats_pause_get(struct mlx5e_priv *priv,
> struct ethtool_pause_stats *pause_stats)
> @@ -791,9 +791,11 @@ void mlx5e_stats_pause_get(struct mlx5e_priv
> *priv,
>
> pause_stats->tx_pause_frames =
> MLX5E_READ_CTR64_BE_F(ppcnt_ieee_802_3,
> +
> eth_802_3_cntrs_grp_data_layout,
>
> a_pause_mac_ctrl_frames_transmitted);
> pause_stats->rx_pause_frames =
> MLX5E_READ_CTR64_BE_F(ppcnt_ieee_802_3,
> +
> eth_802_3_cntrs_grp_data_layout,
>
> a_pause_mac_ctrl_frames_received);
> }
>
> @@ -1015,6 +1017,28 @@ static
> MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(phy)
> mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT,
> 0, 0);
> }
>
> +void mlx5e_stats_fec_get(struct mlx5e_priv *priv,
> + struct ethtool_fec_stats *fec_stats)
> +{
> + u32 ppcnt_phy_statistical[MLX5_ST_SZ_DW(ppcnt_reg)];
> + struct mlx5_core_dev *mdev = priv->mdev;
> + u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};
> + int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
> +
> + if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group))
> + return;
> +
> + MLX5_SET(ppcnt_reg, in, local_port, 1);
> + MLX5_SET(ppcnt_reg, in, grp,
> MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP);
> + mlx5_core_access_reg(mdev, in, sz, ppcnt_phy_statistical,
> + sz, MLX5_REG_PPCNT, 0, 0);
> +
other than that the FW might fail us here, LGTM.
Acked-by: Saeed Mahameed <sae...@nvidia.com>
