>-----Original Message-----
>From: Vladimir Oltean <[email protected]>
>Sent: Saturday, April 17, 2021 2:42 AM
>To: Jakub Kicinski <[email protected]>; David S. Miller
><[email protected]>; [email protected]; Po Liu
><[email protected]>
>Cc: Claudiu Manoil <[email protected]>; Alexandru Marginean
><[email protected]>; Rob Herring <[email protected]>;
>Shawn Guo <[email protected]>; [email protected];
>[email protected]; Russell King - ARM Linux admin
><[email protected]>; Andrew Lunn <[email protected]>; Michael Walle
><[email protected]>; Vladimir Oltean <[email protected]>
>Subject: [PATCH net-next 5/5] net: enetc: add support for flow control
>
>From: Vladimir Oltean <[email protected]>
>
>In the ENETC receive path, a frame received by the MAC is first stored
>in a 256KB 'FIFO' memory, then transferred to DRAM when enqueuing it to
>the RX ring. The FIFO is a shared resource for all ENETC ports, but
>every port keeps track of its own memory utilization, on RX and on TX.
>
>There is a setting for RX rings through which they can either operate in
>'lossy' mode (where the lack of a free buffer causes an immediate
>discard of the frame) or in 'lossless' mode (where the lack of a free
>buffer in the ring makes the frame stay longer in the FIFO).
>
>In turn, when the memory utilization of the FIFO exceeds a certain
>margin, the MAC can be configured to emit PAUSE frames.
>
>There is enough FIFO memory to buffer up to 3 MTU-sized frames per RX
>port while not jeopardizing the other use cases (jumbo frames), and
>also not consume bytes from the port TX allocations. Also, 3 MTU-sized
>frames worth of memory is enough to ensure zero loss for 64 byte packets
>at 1G line rate.
>
>Signed-off-by: Vladimir Oltean <[email protected]>
Reviewed-by: Claudiu Manoil <[email protected]>
