On Mon, Aug 20, 2007 at 05:05:18PM -0700, Paul E. McKenney wrote: > On Tue, Aug 21, 2007 at 01:02:01AM +0200, Segher Boessenkool wrote: > > >>And no, RMW on MMIO isn't "problematic" at all, either. > > >> > > >>An RMW op is a read op, a modify op, and a write op, all rolled > > >>into one opcode. But three actual operations. > > > > > >Maybe for some CPUs, but not all. ARM for instance can't use the > > >load exclusive and store exclusive instructions to MMIO space. > > > > Sure, your CPU doesn't have RMW instructions -- how to emulate > > those if you don't have them is a totally different thing. > > I thought that ARM's load exclusive and store exclusive instructions > were its equivalent of LL and SC, which RISC machines typically use to > build atomic sequences of instructions -- and which normally cannot be > applied to MMIO space.
Absolutely correct. -- Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of: - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
