According Arnd's suggestion, the user might set the tx coalesce value
in large range for different workloads, so we should define them to
appropriate value.

Signed-off-by: Ding Tianhong <[email protected]>
Cc: "David S. Miller" <[email protected]>
Cc: Eric Dumazet <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Zhangfei Gao <[email protected]>
Cc: Dan Carpenter <[email protected]>
Cc: Joe Perches <[email protected]>
---
 drivers/net/ethernet/hisilicon/hip04_eth.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hip04_eth.c 
b/drivers/net/ethernet/hisilicon/hip04_eth.c
index b72d238..b0a7f03 100644
--- a/drivers/net/ethernet/hisilicon/hip04_eth.c
+++ b/drivers/net/ethernet/hisilicon/hip04_eth.c
@@ -126,10 +126,10 @@
 #define DRV_NAME                       "hip04-ether"
 #define DRV_VERSION                    "v1.0"
 
-#define HIP04_MAX_TX_COALESCE_USECS    200
-#define HIP04_MIN_TX_COALESCE_USECS    100
-#define HIP04_MAX_TX_COALESCE_FRAMES   200
-#define HIP04_MIN_TX_COALESCE_FRAMES   100
+#define HIP04_MAX_TX_COALESCE_USECS    100000
+#define HIP04_MIN_TX_COALESCE_USECS    1
+#define HIP04_MAX_TX_COALESCE_FRAMES   (TX_DESC_NUM - 1)
+#define HIP04_MIN_TX_COALESCE_FRAMES   1
 
 struct tx_desc {
        u32 send_addr;
-- 
1.8.0


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