From: Rabin Vincent <[email protected]> Date: Tue, 5 Jan 2016 18:34:04 +0100
> The LSR instruction cannot be used to perform a zero right shift since a > 0 as the immediate value (imm5) in the LSR instruction encoding means > that a shift of 32 is perfomed. See DecodeIMMShift() in the ARM ARM. > > Make the JIT skip generation of the LSR if a zero-shift is requested. > > This was found using american fuzzy lop. > > Signed-off-by: Rabin Vincent <[email protected]> Applied, thanks. -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
