Mark Johnson wrote:
This is a good area to investigate. I don't believe a new DDI interface is the way to approach it though (e.g. ddi_dma_mblk_bind_handle()). It should be an option to be done for you in gld. i.e. gld gives you a list of cookies that fit within your dma constraints (dma_attr).
Why not put it in the DDI? There's nothing GLD specific about DMA.
There's more to it than just caching a PFN though. The real solution is to bring the rx and tx code path optimizations around buffer management into a common piece of code (I know it sounds blue sky :-), but it's what's needed long term). It's more important to bring all the NICs up to a consistent level. I would expect different code paths for both different platforms and different NIC properties.
The diversity of NIC h/s is the reason why the goal of common codepath optimization is probably not realistic. I've come across many NIC drivers and the schemes for driving different chips is usually too diverse; it would be possible to make code common but it would just be equally bad on all chips.
Paul -- =================================== Paul Durrant http://www.linkedin.com/in/pdurrant =================================== _______________________________________________ networking-discuss mailing list [email protected]
