I don't know how you design your chips but if you are using Verilog, be sure to checkout this repo: [https://github.com/kaushalmodi/nim-systemverilog-dpic](https://github.com/kaushalmodi/nim-systemverilog-dpic)
And awesome news!
I don't know how you design your chips but if you are using Verilog, be sure to checkout this repo: [https://github.com/kaushalmodi/nim-systemverilog-dpic](https://github.com/kaushalmodi/nim-systemverilog-dpic)
And awesome news!