Add NV96 in NV9X_GRCLASS8297_CHIPSETS bitmask and remove the test
blocking NV9x (another test is already present above).
>From d6dbc4e172be2d6aa6155b5621f5e9acfa13b12d Mon Sep 17 00:00:00 2001
From: Victor Stinner <[email protected]>
Date: Fri, 6 Mar 2009 14:08:00 +0100
Subject: [PATCH] Enable NV96 support
Add NV96 in NV9X_GRCLASS8297_CHIPSETS bitmask and remove the test
blocking NV9x (another test is already present above)
---
src/gallium/drivers/nv50/nv50_screen.c | 8 +-------
1 files changed, 1 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index 9bf5e8c..4130ede 100644
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -31,7 +31,7 @@
#define NV5X_GRCLASS5097_CHIPSETS 0x00000001
#define NV8X_GRCLASS8297_CHIPSETS 0x00000050
-#define NV9X_GRCLASS8297_CHIPSETS 0x00000014
+#define NV9X_GRCLASS8297_CHIPSETS 0x00000054
static boolean
nv50_screen_is_format_supported(struct pipe_screen *pscreen,
@@ -190,12 +190,6 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
}
/* 3D object */
- if ((chipset & 0xf0) != 0x50 && (chipset & 0xf0) != 0x80) {
- NOUVEAU_ERR("Not a G8x chipset\n");
- nv50_screen_destroy(&screen->pipe);
- return NULL;
- }
-
switch (chipset & 0xf0) {
case 0x50:
if (NV5X_GRCLASS5097_CHIPSETS & (1 << (chipset & 0x0f)))
--
1.5.6.3
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