On 07/02/18 05:31, John Hubbard wrote: > On 01/28/2018 04:05 PM, Martin Peres wrote: >> On 29/01/18 01:24, Martin Peres wrote: >>> On 28/11/17 07:32, John Hubbard wrote: >>>> On 11/23/2017 02:48 PM, Martin Peres wrote: >>>>> On 23/11/17 10:06, John Hubbard wrote: >>>>>> On 11/22/2017 05:07 PM, Martin Peres wrote: >>>>>>> Hey, >>>>>>> >>>>>>> Thanks for your answer, Andy! >>>>>>> >>>>>>> On 22/11/17 04:06, Ilia Mirkin wrote: >>>>>>>> On Tue, Nov 21, 2017 at 8:29 PM, Andy Ritger <arit...@nvidia.com> >>>>>>>> wrote: >>>>>>>> Martin's question was very long, but it boils down to this: >>>>>>>> >>>>>>>> How do we compute the correct values to write into the e114/e118 pwm >>>>>>>> registers based on the VBIOS contents and current state of the board >>>>>>>> (like temperature). >>>>>>> >>>>>>> Unfortunately, it can also be the e11c/e120 couple, or 0x200d8/dc on >>>>>>> GF119+, or 0x200cd/d0 on Kepler+. >>>>>>> >>>>>>> At least, it looks like we know which PWM controler we need to drive, so >>>>>>> I did not want to muddy the water even more by giving register >>>>>>> addresses, rather concentrating on the problem at hand: How to compute >>>>>>> the duty value for the PWM controler. >>>>>>> >>>>>>>> >>>>>>>> We generally do this right, but appear to get it extra-wrong for >>>>>>>> certain GPUs. >>>>>>> >>>>>>> Yes... So far, we are always safe, but users tend to mind when their >>>>>>> computer sound like a jumbo jet at take off... Who would have thought? >>>>>>> :D >>>>>>> >>>>>>> Anyway, looking forward to your answer! >>>>>>> >>>>>>> Cheers, >>>>>>> Martin >>>>>> > [...] > > Hi Martin, > > I strongly suspect you are seeing a special behavior, which is: on > some GF108 boards we use only a very limited range of PWM, > 0.4 to 2.5%, due to the particular type of DC power conversion > circuit on those boards. However, it could also just be difficulties > in interpreting the fixed-point variables in the tables. In either > case, the answer is to explain those formats, so I'll do that now. > > I am attaching the fan cooler table, in HTML format. We have also > published the BIT (BIOS Information Table) format, separately: > > > http://download.nvidia.com/open-gpu-doc/BIOS-Information-Table/1/BIOS-Information-Table.html > > , but I don't think it has any surprises for you, in this regard. You > can check it, to be sure you're looking at the right subtable, though, > just in case. > > The interesting parts of that table are: > > PWM Scale Slope (16 bits): > > Slope to scale effective PWM to actual PWM (1/4096, F4.12, signed). > For backwards compatibility, a value of 0.0 (0x0000) is interpreted as 1.0 > (0x1000). > This value is used to scale the effective PWM duty cycle, a conceptual > fraction > of full speed (0% to 100%), to the actual electrical PWM duty cycle. > PWM(actual) = Slope × PWM(effective) + Offset > > PWM Scale Offset (16 bits): > > Offset to scale effective PWM to actual PWM (1/4096, F4.12, signed). > This value is used to scale the effective PWM duty cycle, a conceptual > fraction > of full speed (0% to 100%), to the actual electrical PWM duty cycle. > PWM(actual) = Slope × PWM(effective) + Offset > > > However, the calculations are hard to get right, and the table stores > values in fixed-point format, so I'm showing a few simplified code excerpts > that use these. The various fixed point macro definitions are found as part of > our normal driver package, in nvmisc.h and nvtypes.h. Any other definitions > that you need are included right here (I ran a quick compiler check to be > sure.)
Wow John, thanks a lot! Sorry for the delay, I was on vacation when you posted this, but this definitely is what I was looking for! Thanks a lot for the code example, I will try to make use of it soon and come back to you if I still have issues! Martin _______________________________________________ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
