On Wed, May 6, 2020 at 10:39 AM Lucas Stach <d...@lynxeye.de> wrote: > > Am Mittwoch, den 06.05.2020, 10:26 -0400 schrieb Ilia Mirkin: > > [please keep list cc'd in your replies] > > > > On Wed, May 6, 2020 at 10:15 AM Milan Buška <milan.bu...@gmail.com> wrote: > > > [ 0.000000] Linux version 5.6.10-zotac (root@saux) (gcc version 9.3.0 > > > (SAUX Aarch64)) #1 SMP PREEMPT Tue May 5 22:16:40 CEST 2020 > > > [ 0.000000] Machine model: NVIDIA Jetson TX2 Developer Kit > > > > [...] > > > > > [ 3.965934] tegra-pcie 10003000.pcie: Adding to iommu group 5 > > > [ 3.966435] tegra-pcie 10003000.pcie: 4x1, 1x1 configuration > > > [ 3.968057] tegra-pcie 10003000.pcie: probing port 0, using 4 lanes > > > [ 3.970121] tegra-pcie 10003000.pcie: probing port 1, using 0 lanes > > > [ 3.972183] tegra-pcie 10003000.pcie: probing port 2, using 1 lanes > > > [ 5.260316] tegra-pcie 10003000.pcie: link 1 down, ignoring > > > [ 6.479410] tegra-pcie 10003000.pcie: link 2 down, ignoring > > > [ 6.479579] tegra-pcie 10003000.pcie: PCI host bridge to bus 0000:00 > > > [ 6.479602] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] > > > [ 6.479627] pci_bus 0000:00: root bus resource [mem > > > 0x50100000-0x57ffffff] > > > [ 6.479646] pci_bus 0000:00: root bus resource [mem > > > 0x58000000-0x7fffffff pref] > > > [ 6.479668] pci_bus 0000:00: root bus resource [bus 00-ff] > > > [ 6.479850] pci 0000:00:01.0: [10de:10e5] type 01 class 0x060400 > > > [ 6.479887] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 > > > offset 0x4 may corrupt adjacent RW1C bits > > > [ 6.479916] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 > > > offset 0x4 may corrupt adjacent RW1C bits > > > [ 6.479993] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 > > > offset 0x3e may corrupt adjacent RW1C bits > > > [ 6.480041] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 > > > offset 0x52 may corrupt adjacent RW1C bits > > > [ 6.480118] pci 0000:00:01.0: PME# supported from D0 D1 D2 D3hot D3cold > > > [ 6.480141] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 > > > offset 0x4c may corrupt adjacent RW1C bits > > > [ 6.482485] pci 0000:00:01.0: bridge configuration invalid ([bus > > > 00-00]), reconfiguring > > > [ 6.482521] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 > > > offset 0x3e may corrupt adjacent RW1C bits > > > [ 6.482576] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 > > > offset 0x3e may corrupt adjacent RW1C bits > > > [ 6.482607] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 > > > offset 0x3e may corrupt adjacent RW1C bits > > > [ 6.482635] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 > > > offset 0x6 may corrupt adjacent RW1C bits > > > [ 6.482794] pci 0000:01:00.0: [10de:128b] type 00 class 0x030000 > > > [ 6.482931] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00ffffff] > > > [ 6.482976] pci 0000:01:00.0: reg 0x14: [mem 0x00000000-0x07ffffff > > > 64bit pref] > > > [ 6.483022] pci 0000:01:00.0: reg 0x1c: [mem 0x00000000-0x01ffffff > > > 64bit pref] > > > [ 6.483056] pci 0000:01:00.0: reg 0x24: [io 0x0000-0x007f] > > > [ 6.483087] pci 0000:01:00.0: reg 0x30: [mem 0x00000000-0x0007ffff > > > pref] > > > [ 6.483313] pci 0000:01:00.0: 4.000 Gb/s available PCIe bandwidth, > > > limited by 5 GT/s x1 link at 0000:00:01.0 (capable of 32.000 Gb/s with 5 > > > GT/s x8 link) > > > [ 6.483463] pci 0000:01:00.0: vgaarb: VGA device added: > > > decodes=io+mem,owns=none,locks=none > > > [ 6.483556] pci 0000:01:00.1: [10de:0e0f] type 00 class 0x040300 > > > [ 6.483648] pci 0000:01:00.1: reg 0x10: [mem 0x00000000-0x00003fff] > > > [ 6.485344] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 > > > [ 6.485368] pci_bus 0000:00: 1-byte config write to 0000:00:01.0 > > > offset 0x1a may corrupt adjacent RW1C bits > > > [ 6.485411] pci 0000:00:01.0: BAR 15: assigned [mem > > > 0x58000000-0x63ffffff 64bit pref] > > > [ 6.485431] pci 0000:00:01.0: BAR 14: assigned [mem > > > 0x50800000-0x51ffffff] > > > [ 6.485448] pci 0000:00:01.0: BAR 13: assigned [io 0x1000-0x1fff] > > > [ 6.485471] pci 0000:01:00.0: BAR 1: assigned [mem > > > 0x58000000-0x5fffffff 64bit pref] > > > [ 6.485510] pci 0000:01:00.0: BAR 3: assigned [mem > > > 0x60000000-0x61ffffff 64bit pref] > > > [ 6.485547] pci 0000:01:00.0: BAR 0: assigned [mem > > > 0x51000000-0x51ffffff] > > > [ 6.485569] pci 0000:01:00.0: BAR 6: assigned [mem > > > 0x50800000-0x5087ffff pref] > > > [ 6.485588] pci 0000:01:00.1: BAR 0: assigned [mem > > > 0x50880000-0x50883fff] > > > [ 6.485610] pci 0000:01:00.0: BAR 5: assigned [io 0x1000-0x107f] > > > [ 6.485631] pci 0000:00:01.0: PCI bridge to [bus 01] > > > [ 6.485648] pci 0000:00:01.0: bridge window [io 0x1000-0x1fff] > > > [ 6.485668] pci 0000:00:01.0: bridge window [mem > > > 0x50800000-0x51ffffff] > > > [ 6.485691] pci 0000:00:01.0: bridge window [mem > > > 0x58000000-0x63ffffff 64bit pref] > > > [ 6.485760] pci 0000:00:01.0: nv_msi_ht_cap_quirk didn't locate host > > > bridge > > > [ 6.485857] pcieport 0000:00:01.0: Adding to iommu group 5 > > > [ 6.485930] pcieport 0000:00:01.0: enabling device (0000 -> 0003) > > > [ 6.486051] pcieport 0000:00:01.0: PME: Signaling with IRQ 40 > > > [ 6.486378] pcieport 0000:00:01.0: AER: enabled with IRQ 40 > > > [ 6.486714] pci 0000:01:00.1: D0 power state depends on 0000:01:00.0 > > > > Hm, I can't say that I've ever seen that "2-byte config write" errors. > > However it does appear to have assigned the BARs correctly, so there's > > that. > > > > > [ 12.885866] nouveau 0000:01:00.0: Adding to iommu group 5 > > > [ 12.891373] nouveau 0000:01:00.0: enabling device (0000 -> 0003) > > > [ 12.897619] nouveau 0000:01:00.0: NVIDIA GK208B (b060b0b1) > > > [ 13.086682] nouveau 0000:01:00.0: bios: version 80.28.a6.00.10 > > > [ 13.288626] nouveau 0000:01:00.0: fb: 1024 MiB DDR3 > > > [ 14.749542] [TTM] Zone kernel: Available graphics memory: 3986272 KiB > > > [ 14.756096] [TTM] Zone dma32: Available graphics memory: 2097152 KiB > > > [ 14.762626] [TTM] Initializing pool allocator > > > [ 14.766999] [TTM] Initializing DMA pool allocator > > > [ 14.771750] nouveau 0000:01:00.0: DRM: VRAM: 1024 MiB > > > [ 14.776808] nouveau 0000:01:00.0: DRM: GART: 1048576 MiB > > > [ 14.782147] nouveau 0000:01:00.0: DRM: TMDS table version 2.0 > > > [ 14.787905] nouveau 0000:01:00.0: DRM: DCB version 4.0 > > > [ 14.793053] nouveau 0000:01:00.0: DRM: DCB outp 00: 01000f02 00020030 > > > [ 14.799504] nouveau 0000:01:00.0: DRM: DCB outp 01: 02011f62 00020010 > > > [ 14.805948] nouveau 0000:01:00.0: DRM: DCB outp 02: 02022f10 00000000 > > > [ 14.812393] nouveau 0000:01:00.0: DRM: DCB conn 00: 00001031 > > > [ 14.818056] nouveau 0000:01:00.0: DRM: DCB conn 01: 00002161 > > > [ 14.823724] nouveau 0000:01:00.0: DRM: DCB conn 02: 00000200 > > > [ 14.831977] nouveau 0000:01:00.0: DRM: MM: using COPY for buffer copies > > > [ 14.841690] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). > > > [ 14.848322] [drm] Driver supports precise vblank timestamp query. > > > [ 15.136647] nouveau 0000:01:00.0: DRM: allocated 1920x1080 fb: > > > 0x80000, bo 00000000d53241e4 > > > [ 17.146929] nouveau 0000:01:00.0: DRM: core notifier timeout > > > [ 19.146846] nouveau 0000:01:00.0: DRM: base-0: timeout > > > [ 19.147554] Console: switching to colour frame buffer device 240x67 > > > [ 19.446311] nouveau 0000:01:00.0: DRM: GPU lockup - switching to > > > software fbcon > > > [ 19.501043] nouveau 0000:01:00.0: fb0: nouveaudrmfb frame buffer device > > > [ 19.523471] [drm] Initialized nouveau 1.3.1 20120801 for 0000:01:00.0 > > > on minor 0 > > > > So that "core notifier timeout" and subsequent GPU lockup indicate > > that something's amiss. Most of the initialization was able to be > > completed, including reading EDID from your monitor (hence the > > non-default resolution), but we're not seeing values change properly / > > missing notifications. I'm actually wondering if we aren't > > initializing the GPU because we think it's already initialized. Could > > you boot with nouveau.config=NvForcePost=1 and see if that helps? > > Note that PCIe is non-coherent on most ARM devices (including Tegra TX2 > IIRC), so if the notifier BO isn't mapped as uncached memory, you > probably won't see the expected notifier content, as you are reading > stale cache line content.
I *believe* that as part of getting nouveau working with the Tegra in-SoC GPU, at least the fence logic was adjusted. However perhaps we didn't do it for notifier memory... worth checking. Thanks for the info! -ilia _______________________________________________ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
