On 9/22/25 12:12 PM, Timur Tabi wrote: > On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote: >> + >> + /// Check if the RISC-V core is active. >> + /// >> + /// Returns `true` if the RISC-V core is active, `false` otherwise. >> + #[expect(unused)] >> + pub(crate) fn is_riscv_active(&self, bar: &Bar0) -> Result<bool> { >> + let cpuctl = regs::NV_PRISCV_RISCV_CPUCTL::read(bar, &E::ID); >> + Ok(cpuctl.active_stat()) >> + } > > This should be part of the HAL, because a different register is used on > Turing. > > You can leave it here if you want, and I'll move into a HAL when I post > Turing support. Your > choice.
Yes, it's similar to the DMA mask patch in that regard (Hopper/Blackwell needs a different value). In the spirit of the current "soul" of patchsets, which is "get GPU firmware running on Ampere/Ada"), I think let's defer the HALs until the first patchset that needs them. thanks, -- John Hubbard