This allows Architecture to be passed into register!() and bitfield!() macro calls. That in turn requires a default implementation for Architecture.
This simplifies transforming BOOT0 (and later, BOOT42) register values into GPU architectures. Cc: Danilo Krummrich <[email protected]> Cc: Timur Tabi <[email protected]> Suggested-by: Alexandre Courbot <[email protected]> Signed-off-by: John Hubbard <[email protected]> --- drivers/gpu/nova-core/gpu.rs | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index 8173cdcd8378..27b8926977da 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -109,8 +109,10 @@ fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { } /// Enum representation of the GPU generation. -#[derive(fmt::Debug)] +#[derive(fmt::Debug, Default)] +#[repr(u8)] pub(crate) enum Architecture { + #[default] Turing = 0x16, Ampere = 0x17, Ada = 0x19, @@ -129,6 +131,13 @@ fn try_from(value: u8) -> Result<Self> { } } +impl From<Architecture> for u8 { + fn from(value: Architecture) -> Self { + // CAST: `Architecture` is `repr(u8)`, so this cast is always lossless. + value as u8 + } +} + pub(crate) struct Revision { pub(crate) major: u8, pub(crate) minor: u8, -- 2.51.2
