The with_falcon_mem() method initializes the 'imem' and 'sec' fields of the NV_PFALCON_FALCON_DMATRFCMD register based on the value of the FalconMem type.
Signed-off-by: Timur Tabi <[email protected]> --- drivers/gpu/nova-core/falcon.rs | 10 ++++------ drivers/gpu/nova-core/regs.rs | 10 ++++++++++ 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs index ece8b92a627e..1867d3727582 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -448,7 +448,6 @@ fn dma_wr<F: FalconFirmware<Target = E>>( fw: &F, target_mem: FalconMem, load_offsets: FalconLoadTarget, - sec: bool, ) -> Result { const DMA_LEN: u32 = 256; @@ -508,8 +507,7 @@ fn dma_wr<F: FalconFirmware<Target = E>>( let cmd = regs::NV_PFALCON_FALCON_DMATRFCMD::default() .set_size(DmaTrfCmdSize::Size256B) - .set_imem(target_mem != FalconMem::Dmem) - .set_sec(if sec { 1 } else { 0 }); + .with_falcon_mem(target_mem); for pos in (0..num_transfers).map(|i| i * DMA_LEN) { // Perform a transfer of size `DMA_LEN`. @@ -544,15 +542,15 @@ pub(crate) fn dma_load<F: FalconFirmware<Target = E>>(&self, bar: &Bar0, fw: &F) .set_mem_type(FalconFbifMemType::Physical) }); - self.dma_wr(bar, fw, FalconMem::ImemSec, fw.imem_sec_load_params(), true)?; - self.dma_wr(bar, fw, FalconMem::Dmem, fw.dmem_load_params(), true)?; + self.dma_wr(bar, fw, FalconMem::ImemSec, fw.imem_sec_load_params())?; + self.dma_wr(bar, fw, FalconMem::Dmem, fw.dmem_load_params())?; if let Some(nmem) = fw.imem_ns_load_params() { // This code should never actual get executed, because the ImemNs // section only exists on firmware used by Turing and GA100, and // those platforms do not use DMA. But we include this code for // consistency. - self.dma_wr(bar, fw, FalconMem::ImemNs, nmem, false)?; + self.dma_wr(bar, fw, FalconMem::ImemNs, nmem)?; } self.hal.program_brom(self, bar, &fw.brom_params())?; diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs index 274e53a1a44d..f79c7fdae6d9 100644 --- a/drivers/gpu/nova-core/regs.rs +++ b/drivers/gpu/nova-core/regs.rs @@ -16,6 +16,7 @@ FalconCoreRevSubversion, FalconFbifMemType, FalconFbifTarget, + FalconMem, FalconModSelAlgo, FalconSecurityModel, PFalcon2Base, @@ -290,6 +291,15 @@ pub(crate) fn mem_scrubbing_done(self) -> bool { 16:16 set_dmtag as u8; }); +impl NV_PFALCON_FALCON_DMATRFCMD { + /// Programs the 'imem' and 'sec' fields for the given FalconMem + pub(crate) fn with_falcon_mem(self, mem: FalconMem) -> Self { + self + .set_imem(mem != FalconMem::Dmem) + .set_sec(if mem == FalconMem::ImemSec { 1 } else { 0 }) + } +} + register!(NV_PFALCON_FALCON_DMATRFFBOFFS @ PFalconBase[0x0000011c] { 31:0 offs as u32; }); -- 2.51.2
