On 2/9/26 2:40 PM, Timur Tabi wrote:
> GA100 is a compute-only variant of GA102 that boots GSP-RM like a Turing.
>
> Although architecturally like an Ampere, GA100 uses the same GSP-RM
> firmware files as Turing, and therefore must boot it like Turing does.
> In addition, as a compute-only part, GA100 has no display engine,
> no VBIOS, and no graphics (GR) engine.
>
> Since it doesn't have VBIOS, there is no FWSEC firmware, and so there is
> no FRTS region that needs to be reserved or initialized.
>
> Although Nouveau now supports GA100, there is currently no real support
> for this GPU with either Clover or Rusticl/NVK, as both require a 3D
> engine. This is in contrast with GH100, which does contain a GR engine
> and is supported.
>
> Also note that this patch partially reverts commit e8b3627bec35 ("nouveau:
> don't attempt fwsec on sb on newer platforms."), which added fwsec
> pointers to struct ga100_gsp erroneously.
>
> Signed-off-by: Timur Tabi <[email protected]>
> ---
> .../gpu/drm/nouveau/nvkm/engine/device/base.c | 11 ++---------
> .../gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c | 4 ----
> .../gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c | 18 +++++++++++++-----
> 3 files changed, 15 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> index 2517b65d8faa..fc730ed05fcb 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> @@ -2513,7 +2513,6 @@ static const struct nvkm_device_chip
> nv170_chipset = {
> .name = "GA100",
> .bar = { 0x00000001, tu102_bar_new },
> - .bios = { 0x00000001, nvkm_bios_new },
> .devinit = { 0x00000001, ga100_devinit_new },
> .fault = { 0x00000001, tu102_fault_new },
> .fb = { 0x00000001, ga100_fb_new },
> @@ -2530,6 +2529,7 @@ nv170_chipset = {
> .vfn = { 0x00000001, ga100_vfn_new },
> .ce = { 0x000003ff, ga100_ce_new },
> .fifo = { 0x00000001, ga100_fifo_new },
> + .sec2 = { 0x00000001, tu102_sec2_new },
> };
>
> static const struct nvkm_device_chip
> @@ -3329,6 +3329,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
> case 0x166: device->chip = &nv166_chipset; break;
> case 0x167: device->chip = &nv167_chipset; break;
> case 0x168: device->chip = &nv168_chipset; break;
> + case 0x170: device->chip = &nv170_chipset; break;
> case 0x172: device->chip = &nv172_chipset; break;
> case 0x173: device->chip = &nv173_chipset; break;
> case 0x174: device->chip = &nv174_chipset; break;
> @@ -3348,14 +3349,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
> case 0x1b6: device->chip = &nv1b6_chipset; break;
> case 0x1b7: device->chip = &nv1b7_chipset; break;
> default:
> - if (nvkm_boolopt(device->cfgopt, "NvEnableUnsupportedChipsets",
> false)) {
> - switch (device->chipset) {
> - case 0x170: device->chip = &nv170_chipset; break;
> - default:
> - break;
> - }
> - }
> -
> if (!device->chip) {
> nvdev_error(device, "unknown chipset (%08x)\n", boot0);
> ret = -ENODEV;
> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c
> b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c
> index 27a13aeccd3c..fdd820eeef81 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c
> @@ -41,15 +41,11 @@ ga100_gsp_flcn = {
> static const struct nvkm_gsp_func
> ga100_gsp = {
> .flcn = &ga100_gsp_flcn,
> - .fwsec = &tu102_gsp_fwsec,
>
> .sig_section = ".fwsignature_ga100",
>
> .booter.ctor = tu102_gsp_booter_ctor,
>
> - .fwsec_sb.ctor = tu102_gsp_fwsec_sb_ctor,
> - .fwsec_sb.dtor = tu102_gsp_fwsec_sb_dtor,
> -
> .dtor = r535_gsp_dtor,
> .oneinit = tu102_gsp_oneinit,
> .init = tu102_gsp_init,
> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
> b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
> index 04b642a1f730..1f7360276744 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c
> @@ -318,8 +318,13 @@ tu102_gsp_oneinit(struct nvkm_gsp *gsp)
> if (ret)
> return ret;
>
> - /* Calculate FB layout. */
> - gsp->fb.wpr2.frts.size = 0x100000;
> + /*
> + * Calculate FB layout. FRTS is a memory region created by the
> FWSEC-FRTS firmware.
> + * FWSEC comes from VBIOS. So on systems with no VBIOS (e.g. GA100),
> the FRTS does
> + * not exist. Therefore, use the existence of VBIOS to determine
> whether to reserve
> + * an FRTS region.
> + */
> + gsp->fb.wpr2.frts.size = device->bios ? 0x100000 : 0;
> gsp->fb.wpr2.frts.addr = ALIGN_DOWN(gsp->fb.bios.addr, 0x20000) -
> gsp->fb.wpr2.frts.size;
>
> gsp->fb.wpr2.boot.size = gsp->boot.fw.size;
> @@ -343,9 +348,12 @@ tu102_gsp_oneinit(struct nvkm_gsp *gsp)
> if (ret)
> return ret;
>
> - ret = nvkm_gsp_fwsec_frts(gsp);
> - if (WARN_ON(ret))
> - return ret;
> + /* Only boot FWSEC-FRTS if it actually exists */
> + if (gsp->fb.wpr2.frts.size) {
> + ret = nvkm_gsp_fwsec_frts(gsp);
> + if (WARN_ON(ret))
> + return ret;
> + }
This looks conceptually correct, although I'm not a nouveau expert, so:
Acked-by: John Hubbard <[email protected]>
thanks,
--
John Hubbard
>
> /* Reset GSP into RISC-V mode. */
> ret = gsp->func->reset(gsp);
>
> base-commit: 310326bb7df4bba094a3fc60364c641c547fd923
