Replace the hardcoded 47-bit DMA mask with per-architecture values. Hopper and Blackwell support 52-bit DMA addresses, while Turing, Ampere, and Ada use 47-bit.
Add Architecture::dma_mask() as a const method with an exhaustive match, so that new architectures will get a compile-time reminder to specify their DMA mask width. Cc: Danilo Krummrich <[email protected]> Cc: Gary Guo <[email protected]> Signed-off-by: John Hubbard <[email protected]> --- drivers/gpu/nova-core/gpu.rs | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index 93bf1c7b3ea1..f6af75656861 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -159,9 +159,18 @@ pub(crate) enum Architecture { Blackwell = 0x1b, } -// TODO: Set the DMA mask per-architecture. Hopper and Blackwell support 52-bit -// DMA addresses. For now, use 47-bit which is correct for Turing, Ampere, and Ada. -const GPU_DMA_BITS: u32 = 47; +impl Architecture { + /// Returns the DMA mask supported by this architecture. + /// + /// Hopper and Blackwell support 52-bit DMA addresses, while earlier architectures + /// (Turing, Ampere, Ada) support 47-bit DMA addresses. + pub(crate) const fn dma_mask(&self) -> DmaMask { + match self { + Self::Turing | Self::Ampere | Self::Ada => DmaMask::new::<47>(), + Self::Hopper | Self::Blackwell => DmaMask::new::<52>(), + } + } +} impl TryFrom<u8> for Architecture { type Error = Error; @@ -301,7 +310,7 @@ pub(crate) fn new<'a>( // SAFETY: No concurrent DMA allocations or mappings can be made because // the device is still being probed and therefore isn't being used by // other threads of execution. - unsafe { pdev.dma_set_mask_and_coherent(DmaMask::new::<GPU_DMA_BITS>())? }; + unsafe { pdev.dma_set_mask_and_coherent(spec.chipset().arch().dma_mask())? }; let chipset = spec.chipset(); -- 2.53.0
